Another day, another problem!
My design uses the PFL in a MAXII to load either a user configuration or factory configuration from a P30 flash via FPP. When programming the flash via JTAG/MAXII/PFL both configurations work. If the user configuration is programmed, the FPGA will configure from the user configuration. If erasing the user configuration via JTAG/MAXII/PFL the Cyclone IV GX FPGA configures from the factory configuration. In short; the JTAG access to the flash works correctly. Each configuration design is designed to light up one of two LEDs on the Cyclone IV GX Dev Kit so I know which design is loaded (factory or user).
I'm also using the Cyclone IV GX to do field upgrade of the user configuration in flash. The idea is to download the user configuration update via PCI Express and reprogram the user configuration flash blocks via a flash controller that resides in the FPGA. I can correctly erase the blocks via the FPGA Flash Controller (blocks verified erased via JTAG as well as via boot to factory configuration afterwards). I can also correctly program the 16-bit words downloaded via PCI Express into flash via the Flash Controller. Programming 38 x 128 KB blocks take about 5 minutes.
The problem is that the FPGA will not configure from the user configuration if programmed by the FPGA. I'm suspecting that i'm not using the correct file format. I have tried SOF and RBF with no luck. Compression is disabled both in QII and the PFL Megawizard. So, my simple question is:
Exactly how do i generate a programming file that I can word-program into flash?
I have seen some forum posts that discuss byte ordering but i'm unsure whether bytes in each word need to be swapped or even words within dword.
Thanks!
My design uses the PFL in a MAXII to load either a user configuration or factory configuration from a P30 flash via FPP. When programming the flash via JTAG/MAXII/PFL both configurations work. If the user configuration is programmed, the FPGA will configure from the user configuration. If erasing the user configuration via JTAG/MAXII/PFL the Cyclone IV GX FPGA configures from the factory configuration. In short; the JTAG access to the flash works correctly. Each configuration design is designed to light up one of two LEDs on the Cyclone IV GX Dev Kit so I know which design is loaded (factory or user).
I'm also using the Cyclone IV GX to do field upgrade of the user configuration in flash. The idea is to download the user configuration update via PCI Express and reprogram the user configuration flash blocks via a flash controller that resides in the FPGA. I can correctly erase the blocks via the FPGA Flash Controller (blocks verified erased via JTAG as well as via boot to factory configuration afterwards). I can also correctly program the 16-bit words downloaded via PCI Express into flash via the Flash Controller. Programming 38 x 128 KB blocks take about 5 minutes.
The problem is that the FPGA will not configure from the user configuration if programmed by the FPGA. I'm suspecting that i'm not using the correct file format. I have tried SOF and RBF with no luck. Compression is disabled both in QII and the PFL Megawizard. So, my simple question is:
Exactly how do i generate a programming file that I can word-program into flash?
I have seen some forum posts that discuss byte ordering but i'm unsure whether bytes in each word need to be swapped or even words within dword.
Thanks!