Hello I am trying to run Baremetal appication on Cyclone V SoC on SoCrates 1.2 board.
Simple applications like Altera-SoCFPGA-HelloWorld-Baremetal works, but as I get to Altera-SocFPGA-HardwareLib-FPGA example it just hangs on waiting for spl_boot_device breakpoint, then I have to push reset button to make it do anything.
I have tried also replacing u-boot with u-boot that ist working for linux on the same board with no results. I've tried both ARMCC and GCC compilers.
I've tried to work from HelloWorld example but there are two limitations, applications can by only 64K and there is no access to memory out of 0xFFFF0000 to 0xFFFFFFF region and memory mapped devices in FPGA on AXI bus.
There is log from Commands window of DS-5:
Is there anyway to fix hangs when using u-boot and baremetal or to not use u-boot at all and get access to memory mapped devices?
Thank you.
Simple applications like Altera-SoCFPGA-HelloWorld-Baremetal works, but as I get to Altera-SocFPGA-HardwareLib-FPGA example it just hangs on waiting for spl_boot_device breakpoint, then I have to push reset button to make it do anything.
I have tried also replacing u-boot with u-boot that ist working for linux on the same board with no results. I've tried both ARMCC and GCC compilers.
I've tried to work from HelloWorld example but there are two limitations, applications can by only 64K and there is no access to memory out of 0xFFFF0000 to 0xFFFFFFF region and memory mapped devices in FPGA on AXI bus.
There is log from Commands window of DS-5:
Code:
Target has been resetExecution stopped at: S:0x00002FA8
S:0x00002FA8 TST r1,#4
+stop
WARNING(CMD315): Target is not running
+wait 30s
+set semihosting enabled false
+loadfile "$sdir/u-boot-spl.axf" 0x0
Loaded section .text: S:0xFFFF0000 ~ S:0xFFFF9543 (size 0x9544)
Loaded section .rodata: S:0xFFFF9544 ~ S:0xFFFFAF33 (size 0x19F0)
Loaded section .data: S:0xFFFFAF38 ~ S:0xFFFFBDFF (size 0xEC8)
Loaded section .bss: S:0xFFFFBE00 ~ S:0xFFFFBEA7 (size 0xA8)
Loaded section .malloc: S:0xFFFFBEA8 ~ S:0xFFFFD2A7 (size 0x1400)
Loaded section .stack: S:0xFFFFD2A8 ~ S:0xFFFFE2A7 (size 0x1000)
Loaded section .spl_irq_stack: S:0xFFFFE2A8 ~ S:0xFFFFE6AF (size 0x408)
Entry point S:0xFFFF0000
+set semihosting enabled true
Semihosting server socket created at port 8000
+delete
All user breakpoints deleted
+tbreak spl_boot_device
Breakpoint 1 at S:0xFFFF0F8C
on file spl.c, line 67
on file spl.c, line 75
+run
Starting target with image /home/bruno/DS-5-Workspace/Altera-SoCFPGA-HardwareLib-FPGA-CV-ARMCC/u-boot-spl.axf
Running from entry point
+wait
Thank you.