We generate VHDL entities with automated tools, and then write the VHDL architecture code using the generated entity code contained in a different file.
This works with lots of other VHDL tools.
Am I correct in concluding this can't be done in Quartus?
Or I am doing something wrong or missing something?
The Quartus log clearly shows the entity file being read into the work library, and then the architecture file containing the architecture in to the same library.
Then we get the Error (10334): entity "foo" is used but not declared.
This works with lots of other VHDL tools.
Am I correct in concluding this can't be done in Quartus?
Or I am doing something wrong or missing something?
The Quartus log clearly shows the entity file being read into the work library, and then the architecture file containing the architecture in to the same library.
Then we get the Error (10334): entity "foo" is used but not declared.