Custom FIFO read in Nios IDE
I created a custom fifo in sopc builder and i am trying to read data from fifo. However, i got no idea about how to manipulate it .Is it right if i make a pointer which points at the base address of...
View ArticleDDR3 and DDR2 at the same time, NIOS II
I'm designing a board using a Cyclone V FPGA, I using the reference design of the Cyclone V E Development Kit Board ( 5CEFA7F31 ), this chip have two hard memory controllers, the Development Kit Board...
View ArticleUbuntu 13.04 (Raring) ModelSim Starter Edition: Running the Program (vsim?)
I installed with iso only the ModelSim starter Edition software running Ubuntu 13.04. I can not run the program: Notthing happens opening the locked vsim (link to program) file. The file points to a...
View Articlemodelsim-altera had not updated result when you change the mif file in the...
i made a test about simulating the RAM with .mif file once it was ok when first time setup the mif file to RAM. but when you changed one or more data of the mif during modelsim-altera is working， you...
View ArticleEnabling Schmitt Triggers for MAX V in Quartus
[SOLVED] Hello everyone, I have recently gotten into programmable logic, and intend to use a MAX V CPLD (5M570ZT100C5N) in one of my projects, specifically for processing some quadrature encoder...
View Articleprintf() and integer type
Hello! I have a problem with printf() command. For this: int a = 5; printf (a); Eclipse send me warning passing argument 1 of 'printf' makes pointer from integer without a cast and nothing is printed...
View ArticleQuestions about the boot from the QSPI Flash.
Hi, Board: Cyclone V SoC FPGA I try to boot from QSPI Flash in this board, but it does not work. BSEL tried both 0x6(1.8V QSPI Flash) and 0x7(3.0V QSPI Flash). Tools that were used is quartus_hps.exe....
View ArticleEpf81188aqc208-3
Hello, As far as i know PLD EPF81188AQC208-3 is obsolete and i am seeking for a suitable replacement to it, any suggestion please? thanks
View ArticleProblem in Quartus: After saving a text file, Quartus want's to reload file
I have a strange problem with Quartus 13.0SP1 on my computer: When i do some changes in a text file (TDF), save the file to disk and change to another window, quartus shows always a dialog box with the...
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Code Not Running (Adding Tightly Coupled Instruction & Data Memory)
Dear Friend's, I have added Tightly coupled instruction and data memory and then-after my Code won't run, there is no activity on eclipse console. Attached is my sopc and Code. kaushal Attached Images...
View ArticleDoes TI's Power desgin reference suites for Altera's FPGA?
TI's Reference:http://www.ti.com/analog/docs/refdes...ntentId=148209 what about the design correct? why Altera does not supply the similar reference? thx!
View ArticleUpdata memory content in pof without recompiling
The design is HDL+Nios,only change nios. When using NIos to generent a .hex file,I must recompile my whole design,such as fitting,mapping.This process cost me long time, I want to find a method. In the...
View ArticleHow to Program Cyclone V SoC Dev Kit EPCQ256
I am looking for directions on how to program the EPCQ256 device on the Cyclone V SoC Dev Kit Board. I tried to accomplish this by generating a jic programming file and use the quartus programmer to do...
View ArticleQuartus II compatibility with Windows 8
Hello all, I am an amateur programmer who has recently started learning VHDL. I have downloaded and installed the Quatus II Free Web Edition from Altera's website. Just for starters I tried to...
View ArticleCannot post here
Hi, I am trying to ask something here and when I click on post or save changes it writes the following An error has occurred shnuk! You must have 10 reputation points in order to post links. Your...
View ArticleDo NOT use AN502 SMBUS Altera IPCORE
Hi all, Beware of using this SMBUS protocol published at Altera website! I've spent 2 months on trying to implement and use this core. It has a lot of bugs, the manual is by all means different than...
View ArticleRemoving GND pins on a transceiver-less cyclone V
Hello, I am designing a board with a E5CS5EBA6U23C8N device (Cyclone V). On the left side of the FPGA, most of pins are connected to GND because this FPGA do not implement Gigabit Transceivers. I am...
View Articleconversion of negative floating point number in binary using VHDL
I was literally stuck witha problem regarding the conversion of negative floating point number in binary and to write it in VHDL.For example the num is -0.8.when i convert it into binary it is like...
View ArticleEarly Power Estimator Problem
Hi, I'm trying to run the cyclone IV EPE. On starting, after the enable macros pop-up, Excel announces Run-time error '429' ActiveX component can't create object. From here, the spreadsheet basically...
View ArticleNios cannot open/access EPSC
Custom Cyclone IV based board. Uses EPCS16 (ST 25P16) for AS configuration of FPGA. Board successfully configures from the EPCS and will then boot Nios, also from the EPCS. However, Nios cannot...
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