Hello everyone.
I'm testing the examples of Embedded SoPC design... by Pong P. Chu. In the code below Ineed the table to be located in RAM. After compilation the memory usage is zero. What did I do wrong?
Thanks.
Tool: Quartus II 13.0.1
Device: Cyclone II (EP2C5T144C6)
I'm testing the examples of Embedded SoPC design... by Pong P. Chu. In the code below Ineed the table to be located in RAM. After compilation the memory usage is zero. What did I do wrong?
Thanks.
Tool: Quartus II 13.0.1
Device: Cyclone II (EP2C5T144C6)
Code:
module adder (a, b, data, clk);
input [3:0] a, b;
output [3:0] data;
input clk;
reg [3:0] data_reg;
(* ramstyle = "M4K" *) reg [3:0] rom_data;
wire [7:0] addr;
always @(posedge clk)
data_reg <= rom_data;
always @*
begin
case (addr)
8'b00000000 : rom_data <= 4'b0000;
8'b00000001 : rom_data <= 4'b0001;
8'b00000010 : rom_data <= 4'b0010;
................................
8'b11111101 : rom_data <= 4'b1100;
8'b11111110 : rom_data <= 4'b1101;
endcase
end
assign data = data_reg;
assign addr = {a, b};
endmodule