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Ability to quickly integrate IPs in OpenCL
hello, I want to insert a verilog code of fuction in OpenCL, how to do that? see the attached photo will give a clear idea about my question. thank you. Attached Images opencl.jpg (20.3 KB)
View Articleabout timing problem of FIR II IP
Hi all, I want to use fir II IP , 4 channel data input the fir behind time-sharing , they share the same coefficient bank. But I don't know the correct input timing of fir?
View ArticleCyclone II FPGA Starter Kit - CSK SD Card Audio - Using GPIO
Extreme newbie question :( Does the provided FPGA configuration that comes with the starter disk (CSK_SD_Card_Audio) have the GPIO header(s) configured to be used? I'm not seeing any variables...
View ArticleModelSim Transcript File
Hello, i recently started out with ModelSim, and am pretty new to it. I have encountered a problem with the transcript file, i.e. i can't seem to set the default setting. When ModelSim is launched in...
View ArticleReading c-counters in ALTPLL RECONFIG
Here's a simple question for anyone who has done this I'm sure. I've added a PLL RECONFIG mega function to my design and it works as advertised. I can write to all the registers to set the frequenies...
View ArticleAdd vhdl records as pin-assignments
Is it possible to create a design which his input/output ports are VHDL records and to make synthesizable and programmable? Let's say I have a package I wrote and in it I define a record type: Code:...
View ArticleQsys VHDL generation SLOW
Being more comfortable with VHDL, I asked Qsys to generate the simulation for my (fairly complex) Qsys system in VHDL. I force quit after over twenty minutes. Then I tried it in Verilog. It took a...
View ArticleSource license of Makefile by Altera
In some GHRD designs, e.g. DE0-Nano-SoC / Atlas-SoC, there is included a Makefile which carries the following header: Code: ################################################# # Makefile to Manage...
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dsP builder 15.1 : cyclone II support
Hi, I just started working with DSP builder but notice that there are no board support files fro cyclone II (Altera DE1 Soc) Please let me know from where I can download them. Its urgent. thank you...
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Problem conversion 'unsigned char' to 'alt_u32'
Hello I try to follow 'Using Triple-Speed Ethernet on DE2-115 Boards'. But i encounters error in compiling C file like below 'cannot convert 'unsigned char*' to 'alt_u32* {aka long unsigned int*}' for...
View ArticleDesign tree QIP->SDC is not present at the 'Files' tab of my new project
Hi there, I'm making simple experiments with the Nios2 with a cheap CycloneII-based development board by making few changes in demo projects, which came at the CD, and so far there were no issues....
View Articlehelp with ethernert plz
hi, i need to send and recive udp data between the altera de2 to pc. i able to send data form the de2 to pc. but i cant send data form the pc to the altera. plz help :-(
View Articlewhere i can download 32 bit lidrary file
i am using 32 bit os. so, i need 32 bit library support file for quartus
View Articleuart tutorial for DE1-SoC
I am trying to get output from a logic I am implementing in the FPGA through the UART (RS232 -> USB ). I am new to the SoC-based design flow and hence couldn't figure out how to connect the...
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accordance order of LUT pin to Cyclone II pin
I use Quartus II v13sp1 WebEdition. Synthesis is performed for FPGA Cyclone II. For my diploma work are necessary to know accordance order of LUT pin to Cyclone II pin what I mean!? by adding LUT its...
View Articlemodelsim problem regarding input initialization
Hello, i recently encountered a problem when simulating in modelsim which was with the outputs not resposnding to the inputs. Then once i initialized all the inputs the outputs responded normally....
View Articleabout global signal asiignment
Hello every body I have a signal in my design that have about 2000 fan out, so I assigned it to a global signal in assignment editor, then i faced many warnings of "Warning (176047): Ignored Global...
View ArticleUsing RAM for register
Hello everyone. I'm testing the examples of Embedded SoPC design... by Pong P. Chu. In the code below Ineed the table to be located in RAM. After compilation the memory usage is zero. What did I do...
View ArticleHow to set compiler flag (-fpermissive) in eclipse?
Hello everybody, I have a beginner question: I would like to mix signed and unsigned char types. Therefore I would like to know how to set the fpermissive flag. I have tried different approaches, none...
View ArticleVideo IP, multi-tap stream
Hi. I have a camera with CameraLink interface whose clock run at 82MHz. In the desired configuration, it should supply 10 monocrhome 8-bit pixels of a line per clock tick when the line is active. It'd...
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