I used the system builder and it generated the Verilog I/O as follows:
//////////// ADC SPI //////////
output ADC_CONVST,
output ADC_SCK,
output ADC_SDI,
input ADC_SDO,
I read the LTC2308 and I am confused on how these registers work in relation to the ADC. According to the datasheet, the ADC_CONVST initiates the data conversion, so wouldn't it be an input? The data sheet also called SCK and SDI as inputs and SD0 as outputs.
I think I'm fundementally thinking about it in the wrong way.
//////////// ADC SPI //////////
output ADC_CONVST,
output ADC_SCK,
output ADC_SDI,
input ADC_SDO,
I read the LTC2308 and I am confused on how these registers work in relation to the ADC. According to the datasheet, the ADC_CONVST initiates the data conversion, so wouldn't it be an input? The data sheet also called SCK and SDI as inputs and SD0 as outputs.
I think I'm fundementally thinking about it in the wrong way.