Quantcast
Channel: Altera Forums
Viewing all articles
Browse latest Browse all 19390

SGDMA transfer from and to Dualclock FIFOs

$
0
0
Hi,

we are searching for a fast DMA solution that will fit into a ALTERA EP4GX15BF14Cx chip and
is compatible to the PCIe design in http://www.alterawiki.com/uploads/3/...cie_gen1x1.zip
to transfer ADC data from a DC FIFO to Host memory and DAC Data from Host memory to a DC FIFO.

We'd like to use the FIFOs from the Attachment, created with the Megawizard:
The "Fifo_PCIe_FrontEnd_32_Bit" (ADC->Host) is to connct directly to the Avalon bus,
the other one, "Fifo_FrontEnd_PCIe_32_Bit", shall receive from the Avalon bus.

Questions:
Does anyone know how to connect them correctly ?
Is ist possible to use/modfiy the SGDMA from the alterawiki design example for both transfers (as it does only Memory to Memory transfers in the example) ?

thanks for any suggestions.
Attached Files

Viewing all articles
Browse latest Browse all 19390

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>