I have and DE1-SoC rev D. And are trying to use the ADC by the IP Library\University Program\Generic IO\De1-SoC Controller.
I read the De1-SoC Controller.pdf file, but it is not enough, I have not been able to capture and analog signal and convert it to a digital signal.
So I started analyzing the CD\Demonstrations\FPGA\DE1_SoC_ADC.
But I have found that the demonstration is different in CD Revision D, E and F.
So, I have some questions:
The IP Library\University Program\Generic IO\De1-SoC Controller, is for the all the DE1-SoC versions (with AD7928 or LTC2308)?
Why in the CD\Demonstrations\FPGA\DE1_SoC_ADC is used a custom Qsys component instead of using the IP Library\University Program\Generic IO\De1-SoC Controller?
Why in the CD Rev. D the Qsysdesign does not include the custom Qsys component and the CD Rev. E and F yes they include it in the Qsys design?
Thanks.
I read the De1-SoC Controller.pdf file, but it is not enough, I have not been able to capture and analog signal and convert it to a digital signal.
So I started analyzing the CD\Demonstrations\FPGA\DE1_SoC_ADC.
But I have found that the demonstration is different in CD Revision D, E and F.
So, I have some questions:
The IP Library\University Program\Generic IO\De1-SoC Controller, is for the all the DE1-SoC versions (with AD7928 or LTC2308)?
Why in the CD\Demonstrations\FPGA\DE1_SoC_ADC is used a custom Qsys component instead of using the IP Library\University Program\Generic IO\De1-SoC Controller?
Why in the CD Rev. D the Qsysdesign does not include the custom Qsys component and the CD Rev. E and F yes they include it in the Qsys design?
Thanks.