Design works with NIOS II/e, not II/f

I have a design in whch I read ADC samples from PIO
with a dual clock FIFO input and transport the output
data with SGDMA to on-chip memory. It took me a few
days of experimenting to discover that the reason that
it did not work was due to the use of NIOS II/f in stead
of NIOS II/e.

Without providing all the details: any idea why NIOS II/f
does not work in this case? I would like to use the more
speedy II/f.

Thanks,
Jos