How important really is the SDC file? How important is it to eliminate all unconstrained paths? Does it have to be ALL of them? (such as altera_reserved_tdi and altera_reserved_tms that seem to work with JTAG)
My experience has always been with simple designs, but now I'm building a 1Gbps in-line packet processor that intercepts and modifies Ethernet packets in real-time as they stream through. I noticed that I always fail timing in TimeQuest, and sometimes my design works, sometimes it doesn't. It's been driving me crazy for the last month.
Client Computer ----> {Ethernet > FPGA > Ethernet} ----> Server
My experience has always been with simple designs, but now I'm building a 1Gbps in-line packet processor that intercepts and modifies Ethernet packets in real-time as they stream through. I noticed that I always fail timing in TimeQuest, and sometimes my design works, sometimes it doesn't. It's been driving me crazy for the last month.
Client Computer ----> {Ethernet > FPGA > Ethernet} ----> Server