The question is result of what I have read here from Sep 2011:
https://www.altera.com/support/suppo...82010_811.html
Is this still true for Quartus in Nov 2016?
Is it correct that fixed point arithmatic can be implemented using std_logic_vectors as long as a person is careful about shifting the bits correctly and truncating them correctly to fit in with the required fixed point format? If so, what is the purpose of the VHDL packages fixed_generic_pkg and fixed_pkg? Are the types sfixed and ufixed defined in them synthesizeable by Quartus? Are there any specific instructions on how to use these fixed point types from these packages in Quartus?
https://www.altera.com/support/suppo...82010_811.html
Is this still true for Quartus in Nov 2016?
Is it correct that fixed point arithmatic can be implemented using std_logic_vectors as long as a person is careful about shifting the bits correctly and truncating them correctly to fit in with the required fixed point format? If so, what is the purpose of the VHDL packages fixed_generic_pkg and fixed_pkg? Are the types sfixed and ufixed defined in them synthesizeable by Quartus? Are there any specific instructions on how to use these fixed point types from these packages in Quartus?