questions about copy project
hi everyone: i use copy prcject to backup my desin, but i met some problems: 1. in quartus, i click project=>copy project, then copy project1 to a new floder and name it project2 2.i use schematic...
View Articledownload pof file cost too much time
hi, everyone: i use max10, when i download pof file, it cost minutes to finish. how can i make it faster? (in spartan6 the mcs file download only cost seconds ) i may have to product thousands products...
View ArticleRapid compilation ignores post-fitting netlists and recompiles everything again
Hi! I am currently working with Cyclone V SoC and compilation time of my project is about 8 min long. My design includes HPS and some simple entities (7 segment driver for example). As I make some...
View Articleadding megafunctions with uppercase names
Apologies if this has already been answered. I am a complete newb in FPGA. Been trying to add lpm_mux gate from megafunctions for a Quartus II 16.1 lite edition on Ubuntu 16.04 (just downloaded the...
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ddr bi-directional with different input/output clocks
Greetings, I am wondering what the correct megafunctions/primitives are for implementing input/output dual-data-rate data lines for a DDR memory device. I'm on a Cyclone IV. Here are my requirements:...
View ArticleTripple Speed Ethernet Simulation Error :[vlog-2110] Illegal reference to
Hi guys I want to simulate the altera TSE IP core to understand control register read write and working of the core. I have followed the method described in ug_ethernet...
View ArticleDoes Quartus II support use of fixed point arithmatic packages in VHDL?
The question is result of what I have read here from Sep 2011: https://www.altera.com/support/suppo...82010_811.html Is this still true for Quartus in Nov 2016? Is it correct that fixed point...
View ArticleAltered Application Stored In SDRAM
I'm using a Cyclone V SoCkit board and programming the processor through a preloader loaded on the FPGA, and then booting the bare metal application from a custom partition on an SD card (though I...
View Articlepin migration 5CEA4, 5CEA5 and 5CEA7 in F484 package
Hi all, just used an 5CEA4 in an F484, and wanted to upgrade to a bigger FPGA. And noticed, that the bigger devices don't have the bank 2A at all. How is this pin migration work, if a lot of the pins...
View Articleinstall Quartus-lite is 64-bit softwar and will not work on the 32-bit...
Hello everyone! I've been working the last week to FPGA programming software. I really new on this. There are some version to run the Quartus-lite to 32-bit platform on linux? When I download the...
View ArticleFpga adc
Hello ALL I am new with FPGA and I have a university work and the first step is to digitize an analog signal in digital using the ADC converter of the own fpga in VHDL (Altera DE0 NANO) ADC128S022 12...
View Articleforum suffering from redirect hack
Hi, I have been seeing redirects to myfilestore.com when clicking on forum links displayed in Google search results. It appears that the forum may be suffering from some sort of vBulletin redirect...
View ArticleWhere can I find fmax?
Hello everyone! After compiling a new design with multiple kernels, I got the following in my <kernel_name>.log file: The compiler had to sacrifice circuit frequency (fmax) to achieve initiation...
View ArticleInterfacing DDR or SRAM
Hello, Iam so sorry for my newbie question but i've already read sooo many literature but iam not sure what is what. Sooo. I need high count of BLVDS. Iam using it on my backbone as data communication...
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Hold time violation
Hi @ everyone! In our project, lately we get a hold time violation. FPGA: Cyclone V Clk period: 31.625 ns The signals where the violation occurs are intern signals. In the attachment you can see more...
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sopc-create-header-files : command not found ?
hi, iam an beginner in fpga soc.... i try the tutorial "my_first_hps_fpga.pdf" .... so i have an problem to generate header files about embedded command shell... if i want to execute the bash-file...
View ArticleintelFPGA_lite crashes at launch (Inconsistency detected by ld.so:...
OS: Ubuntu Xenial 16.04 Installation went through smoothly. Sadly quartus just crashes at startup. What is the best way to file a bug? $ ~/intelFPGA_lite/16.1/quartus/bin/quartus Inconsistency detected...
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Weird SignalTap behaviour
Trying to solve a mystery, but after several days ran out of thoughts :( Needed to connect to SignalTap around 100 (probably, a bit less) signals, and at some moment got very strange picture...
View ArticleThe lpm_add_sub and lpm_mult both have option to select input type as...
In case of 2's complement, addition and subtraction are the same. I am not sure about multiplication though. Therefore, what difference does it make if we select the input type as being signed or...
View ArticlenativeLink RTL simulation does not start Vsim
Hello All, I'm using Quartus II 32 bit Version 13.1.0 on Ubuntu 14.04 LTS. After some fight, I was able to make it run. I had more investigations to make modelsim run. So now, I'm able to run 'vsim'...
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