Hello,
I want to implement a design with multiple MSI interrupts. Until now I did it with Avalon ST (IP compiler for PCIe , MegaWizard). I tryied to implement it with avalon mm using Qsys but I faced some problems.
I used IP_Compiler for PCI express but I couldnt enable multiple MSI interrupts.
Also I checked Avalon-MM Cyclone V Hard Ip for PCI express and I saw that there is a choice for multiple MSI interrupts.
My project is on Cyclone IV FPGA. So I can not use this component.
So I want to ask:
1) How can I have multiple MSI interrupts using Qsys??? Is it possible? What component should I use?
2) Is there any way to use Avalon-MM Cyclone V Hard Ip for PCI express component for my project?
Thanks in advance!
Antonis
I want to implement a design with multiple MSI interrupts. Until now I did it with Avalon ST (IP compiler for PCIe , MegaWizard). I tryied to implement it with avalon mm using Qsys but I faced some problems.
I used IP_Compiler for PCI express but I couldnt enable multiple MSI interrupts.
Also I checked Avalon-MM Cyclone V Hard Ip for PCI express and I saw that there is a choice for multiple MSI interrupts.
My project is on Cyclone IV FPGA. So I can not use this component.
So I want to ask:
1) How can I have multiple MSI interrupts using Qsys??? Is it possible? What component should I use?
2) Is there any way to use Avalon-MM Cyclone V Hard Ip for PCI express component for my project?
Thanks in advance!
Antonis