Hi,
I've developed an IP Core, were there's a lot of logic operations (xor). All of them are done in a single clock cycle. My IP uses 35.000 LUTs out of 55.000 availalbe in my ARRIA II GX device. Compilation goes ok, but fitter says that he needs 2900LABs (2500 available). I've tried all the area optimizations available in the Resource Advisor. What can i do to make this code fit my device? It fits when i disconnect my IP Core from Onchip Ram Memory which is my interface to connect with external microprocessor (through PCIExpress). Why is this connection so large? I have 2 memories 128 bits wide, and 1 mem 256 bit wide. All of them are dual port altsyncrams, with 32 bit itf from PCIExpress.
Thank You.
I've developed an IP Core, were there's a lot of logic operations (xor). All of them are done in a single clock cycle. My IP uses 35.000 LUTs out of 55.000 availalbe in my ARRIA II GX device. Compilation goes ok, but fitter says that he needs 2900LABs (2500 available). I've tried all the area optimizations available in the Resource Advisor. What can i do to make this code fit my device? It fits when i disconnect my IP Core from Onchip Ram Memory which is my interface to connect with external microprocessor (through PCIExpress). Why is this connection so large? I have 2 memories 128 bits wide, and 1 mem 256 bit wide. All of them are dual port altsyncrams, with 32 bit itf from PCIExpress.
Thank You.