hello
I tried to create a new component with the SOPC Builder, this component is in the form of a verilog file "rtp_tx.v" which must have two interface, avalon master interface to connect with ddr sdram interface and avalon Slave connect with the cpu. but when I added the avalon master interface always displays errors. So I added another component in verilog avalon master, and the component rtp_tx.v I add a single interface avalon slave that I connect with the avalon master interface component avalon master and I connect 'avalon master interface to interface Slave ddr sdram.
it works and the generation is succesfull, but there's always this error
I do not know if what I did is correct or not because I am a beginner in this field
I tried to create a new component with the SOPC Builder, this component is in the form of a verilog file "rtp_tx.v" which must have two interface, avalon master interface to connect with ddr sdram interface and avalon Slave connect with the cpu. but when I added the avalon master interface always displays errors. So I added another component in verilog avalon master, and the component rtp_tx.v I add a single interface avalon slave that I connect with the avalon master interface component avalon master and I connect 'avalon master interface to interface Slave ddr sdram.
it works and the generation is succesfull, but there's always this error
PHP Code:
ERROR:slave data width (26) for slave avalon_master_0/avalon_slave_0 unexpected Error: Generator program for module 'cpu' did NOT run successfully.
I do not know if what I did is correct or not because I am a beginner in this field