Hi Guys,
I am new in this field so I don't have much experience. I assigned my output port to 0 like this:
module ACM_top
(
....output BMC_CSA_L,
output BMC_CSB_L,
.....
);
....
assign BMC_CSA_L = 1'b0;
assign BMC_CSB_L = 1'b1;
...
The synthesized circuit acted right after I programmed the chip but the next time I powered up the circuit, it set BMC_CSA_L tohigh which is not acting as my code.
I did try to assign this port to a register and reset it but my circuit lacks the reset input and it still not worked
module ACM_top
(
....output BMC_CSA_L,
output BMC_CSB_L,
.....
);
...
reg [1:0] rbmccs;
...
assign BMC_CSA_L = rbmccs[0];assign BMC_CSB_L = rbmccs[1];
...
always @ ( posedge Core_Clk or posedge rst )
begin
rbmccs[0] <= 1'b0;
rbmccs[1] <= 1'b1;
end
....
It's not just this two pins didn't work, some other pins as well. Did anyone experience same issue? Please help me solve this problem, thanks!
I am new in this field so I don't have much experience. I assigned my output port to 0 like this:
module ACM_top
(
....output BMC_CSA_L,
output BMC_CSB_L,
.....
);
....
assign BMC_CSA_L = 1'b0;
assign BMC_CSB_L = 1'b1;
...
The synthesized circuit acted right after I programmed the chip but the next time I powered up the circuit, it set BMC_CSA_L tohigh which is not acting as my code.
I did try to assign this port to a register and reset it but my circuit lacks the reset input and it still not worked
module ACM_top
(
....output BMC_CSA_L,
output BMC_CSB_L,
.....
);
...
reg [1:0] rbmccs;
...
assign BMC_CSA_L = rbmccs[0];assign BMC_CSB_L = rbmccs[1];
...
always @ ( posedge Core_Clk or posedge rst )
begin
rbmccs[0] <= 1'b0;
rbmccs[1] <= 1'b1;
end
....
It's not just this two pins didn't work, some other pins as well. Did anyone experience same issue? Please help me solve this problem, thanks!