Cyclone IV GX PLL static power
Cyclone IV FPGA PLL power have 2 components 1. Analog - VCCA (2.5V) 2. Digital - VCCD_PLL (1.2V) Powerplay power analyzer reports & board measurements (GX development) shows static current as 34mA...
View ArticleOnes counter using numeric_std inside process
I had an error while working on ones counter inside the process. I use numeric_std library. Here is the key part of the code. signal one_buf:unsigned(7downto0); signal...
View ArticleUart without Nios
Hi guy!! How can I use UART core without NIOS?? (I want to implement a UART port to Cyclone II without NIOS) Qsys has a UART (RS 232 Serial Port). UART has a Avalon Memory Mapped Slave, so I think if I...
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FPGA freeze while using remote update IP - Cyclone V
Hi, I am using a cylcone V along with EPCQ128 flash memory. The design incorporates a remote update block to switch between factory and application image. POF checking is on and I have signals running...
View ArticleHow to use Ethernet ports for DE4 board without Nios II
Hi, I have a DE4 board. I've seen many designs for Ethernet connections on DE4 board, but all of them are related to Qsys and Nios II. My intention here is not to use Nios II, and Qsys if possible. I'm...
View ArticleIs 1152 pins EP4SE230 real?
I wander that if the EP4SE230FI35N is real! I can not find any informations about1152 pins EP4SE230 chip. If it is real, where to find the pins informations of the chip? Anyone knows? Thanks!
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Ram 2-port connect to nios
Hello! I am new in qsys. I need to connect my nios processor with ram 2-port block in fpga in read/write mode. 1 port will have an access from fpga logic, second connects to nios. What kind of bridge i...
View Articleflashing EPCQ128 instead of EPCS128 since discontinue of EPCS
Since Intel/Altera is pulling the plug on the EPCS manufacturing line (See here) I need to move to EPCQ. I'm working with Remote Update and serial flash loader IP's on Quartus 13.1 (which I flash the...
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context callback:emulator:could not allocate runtime data!
I want to run ldpc on the board a10gx_opm_660 by opencl,but when i run it with the altera emulator,the problem that is 'Context callback:Emulator：Could not allocate runtime data!' occurs. My...
View ArticleFully Synthesizable Fix Point package
Hi, Great- I'v just learned how to use fully synthesizable floating point arithmetic calculation (using MegaFunction/IP cores). Now, how can I implement fully synthesizable Fix point calculation? I...
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serial port demo program working.. but nothing in terminal
hi, i am trying to do hello world program mentioned in below video.. https://www.youtube.com/watch?v=yEtVLTB4hM4 i am using cyclone 5 soc kit. but i got a problem with rx and tx pin assignment..at 4.45...
View ArticleQSYS 17 .0 pro missing .sopcinfo
I have a qsys nios design that is working fine in Quartus 16.1 pro. Did an upgrade to Quartus 17.0 premiere pro and after re-generating the qsys project, the <project>.sopcinfo file was removed...
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Custom Component communication/ triggering - Possibilities
Hello together, I try to build up a QSYS-System in which a custom component (e.g. custom GPIO) can trigger a second custom component (e.g. custom Timer). Till now I figured out two possibilities: The...
View ArticleWriting Fast State Machines using SystemVerilog
Hello, I came across this article that commented on using State Machines with One-Hot encoding. http://www.verilogpro.com/systemveri...state-machine/ The article state, "According to Cliff Cummings...
View Articlenios2-elf-g++ Error
I see an intermittent problem when i try my C codes for NIOS2 in linux using Altera GCC scripts. I use create-this-app and create-this-bsp for compiling and linking c files. sometimes I see this error...
View ArticleHow to improve memory bandwidth
Hi, I want to do empty kernels. First block read data from memory, send this data to channel. Second block receive data from channel and write this data to memory. I execute this code on Arria10 DeVKit...
View ArticleMAX 10 10M02SCU169C8G The output port doesn't initialize as I programmed
Hi Guys, I am new in this field so I don't have much experience. I assigned my output port to 0 like this: module ACM_top ( ....output BMC_CSA_L, output BMC_CSB_L, ..... ); .... assign BMC_CSA_L =...
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Download of Nios II elf in Eclipse to UFM failing
Hi. I have a Nios II project that was previously storing and executing the application in the OCRAM, and now am switching it to store the application in UFM and load it to the OCRAM at start up using...
View ArticleQSYS Pro 17.0 System Contents window missing or incomplete !!!
Hi to all I'm using Qsys Pro for instantiate some components Ips, I have saved my qsys project but today when I tried to open it The System Contents window is incomplete or it is missing !!! I could...
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