UART and RS485: how to control transmit enable on RS485

Hi Forum

I am pretty new working with FPGAs.
I am using the Altera UART IP core which is connected to a RS485 transmitter.
The RS485 transmitter have a receive-enable pin and a transmit enable pin.
Currently the receive-enable pin is always enabled.
The transmit-enable pin is controlled with a pio-pin via software.

I am currently using the driver from Altera in my software.
Currently i am enabling the transmit-enable just before i write data to the uart and then i have put a software delay before disabling the transmit-enable pin again.
But this "design" is not very robust as it is just a constant delay and not actually fitted to the current content.

There must be a clever way to control the transmit-enable pin on the RS485 (maybe making som logic based on the sw-buffer for the uart transmit and the transmit ready bit from the uart status register ?).
I have searched in the forum and via google but i have not been able to find something useful.
I hope that you can give me some tips or direction.


Best regards
Michael