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Convert real to integer in parameter

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Hello.

I am trying to synthesize some Verilog modules that are parametrized using real numbers. The real numbers get converted to actual integer values that are used for the module configuration using some simple calculations (all constants and constant functions). However, I have been unable to find a way to pass those numbers from the real to integer domain that can be accepted as an input for Quartus synthesis.

The functions I have tried are $rtoi (obviously), and I also have $floor and $ceil (that I could just ditch if $rtoi was working). All those functions are supported on my other tools except Quartus, which puzzles me, particularly on the case of $rtoi because the output of that function should be supported integer functionality like $clog2, which in turn is supported.

For example, the following

Code:

parameter RateCounterTop = $rtoi(RateCounterNominal * (1 + RateErrorFraction)); ///< Bit rate counter
gives me the error

Code:

Error (10174): Verilog HDL Unsupported Feature error at XXXXX.v(54): system function "$rtoi" is not supported for synthesis
I tried compiling in SystemVerilog mode, but the error is the same.

Does any one know the recommended way to convert constant real values to constant integer parameters?

Thanks.

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