Where is the 322.265625 MHz clock on the Arria 10 SoC Dev Kit?

All,

I'm testing the Intel Low Latency MAC 10G IP core with the 10GBASE-R Register Mode PHY and it requires a ref clock of 322.265625 MHz into a PLL (Figure 30, UG-20016 | 2018.05.16, https://www.altera.com/documentation...753448747.html)

However, I couldn't find information as to which clock pin of the FPGA (10AS066N3F40E2SG) on the Arria 10 SoC Dev Kit (DK-SOC-10AS066S-A) has the needed frequency. The dev kit's schematic does not say anything about a clock of 322.265625 MHz. Could you please point me to the relevant docs that have the info?

Thanks
Arintel