VHDL code error

Hello,

I am trying to do Bit Error Rate Testor on my FPGA Altera Cyclone V board and SFP-HSMC. I am trying to send 3Gbps of data where as the maximum the transceiver or receiver can send or receive is 3.25Gbps. I am getting few errors which I am not able to figure out where the error exactly is. I request you to please let me know what changes do I need to make in the code.

Thanks a ton in advance.

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