MAX 10 SC and RAM blocks

In our design some RAM blocks are being inferred from our VHDL (no altera IP is being used).


When targeting the device 10M16SCU169A7G and trying to compile the following error occurs:


Error (16021): You specified a configuration mode that includes memory initialization, however memory initialization is not supported by the selected device. In the Device and Pin Options dialog box, choose a configuration mode without memory initialization.


After following the intructions and selecting "Single Image", we run into the next error in the assembler:

Error (14703): Invalid internal configuration mode for design with memory initialization


Doing some research points out to the issues with MAX 10 SC boards and memory initialization issues:


https://www.alteraforum.com/forum/sh...ad.php?t=56869


I though this was only with ROM blocks, Is it possible the inferred RAM blocks also trigger the same issue?, or perhaps I am missing a setting?


If this is in fact the issue, then is there any known workaround?


Thanks!