Hi,
I am making one-way communication between Cyclone V FPGA Board and Xilinx Kintex custom board.
*Cyclone V FPGA Board: I/O standard = LVDS
*Xilinx Kintex custom board: I/O standard =LVDS and LVDS_25
I am trying to pass LVDS signals generating from Cyclone V FPGA Board as input to the LVDS ports of the Xilinx Kintex custom board. But due to mismatch of I/O standard of two FPGA Boards, i am unable to monitor LVDS signals in Xilinx -ILA.
Any solution, please suggest me.
Xilinx Kintex custom board :I/O Planning
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I am making one-way communication between Cyclone V FPGA Board and Xilinx Kintex custom board.
*Cyclone V FPGA Board: I/O standard = LVDS
*Xilinx Kintex custom board: I/O standard =LVDS and LVDS_25
I am trying to pass LVDS signals generating from Cyclone V FPGA Board as input to the LVDS ports of the Xilinx Kintex custom board. But due to mismatch of I/O standard of two FPGA Boards, i am unable to monitor LVDS signals in Xilinx -ILA.
Any solution, please suggest me.
Xilinx Kintex custom board :I/O Planning