Hi,
I like to upload the soc_system.sof via the FPGA manager.
I use the source code of the U-Boot. I have ported it to VxWorks. I use the Altera Evaluation Board REV B. . Before I begin to download the bitstream I setup CLKOUT0 to 32 MHz (32.021605 MHz) and CLKOUT1 to 96 MHz (96.064815).
I setup SW3 on the Evaluation board as follows:
SW3
1|2 |3|4 |5|6|
#| | | |#|#|
|#|#|#| | |
The U-BOOT used the procedure as described in "Cyclone V Device Handbook, Volume 3: Hard Processor System Technical Reference Manuel, A-19 / FPGA Configuration".
After the last bytes of the bitstream are written to the FPGA Manager (to address 0xffb90000) it will be waited till the config is done. Therefore I poll the GPIO_EXT_PORTA of the status registers. I get always the status value 0xB01.
==>
nSTATUS : 1
CONF_DONE : 0
INIT_DONE : 0
CRC_ERROR : 0
CVP_CONF_DONE : 0
PR_READY : 0
PR_ERROR : 0
PR_DONE : 0
nCONFIG Pin : 1
nSTATUS Pin : 1
CONFIG_DONE Pin : 0
FPGA_POWER_ON : 1
To complete the configuration nSTATUS (NS) == 1 && CONFIG_DONE (CD) == 1
Has someone an idea whats going wrong?
Best regards,
Stefan.
I like to upload the soc_system.sof via the FPGA manager.
I use the source code of the U-Boot. I have ported it to VxWorks. I use the Altera Evaluation Board REV B. . Before I begin to download the bitstream I setup CLKOUT0 to 32 MHz (32.021605 MHz) and CLKOUT1 to 96 MHz (96.064815).
I setup SW3 on the Evaluation board as follows:
SW3
1|2 |3|4 |5|6|
#| | | |#|#|
|#|#|#| | |
The U-BOOT used the procedure as described in "Cyclone V Device Handbook, Volume 3: Hard Processor System Technical Reference Manuel, A-19 / FPGA Configuration".
After the last bytes of the bitstream are written to the FPGA Manager (to address 0xffb90000) it will be waited till the config is done. Therefore I poll the GPIO_EXT_PORTA of the status registers. I get always the status value 0xB01.
==>
nSTATUS : 1
CONF_DONE : 0
INIT_DONE : 0
CRC_ERROR : 0
CVP_CONF_DONE : 0
PR_READY : 0
PR_ERROR : 0
PR_DONE : 0
nCONFIG Pin : 1
nSTATUS Pin : 1
CONFIG_DONE Pin : 0
FPGA_POWER_ON : 1
To complete the configuration nSTATUS (NS) == 1 && CONFIG_DONE (CD) == 1
Has someone an idea whats going wrong?
Best regards,
Stefan.