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Unable to access 'Design Optimization' dialog in ModelSim-Altera Starter Edition

Hi Everyone, I am using Quartus II 12.1 Web Edition with ModelSim-Altera 10.1b Starter Edition. Under the Simulation menu of ModelSim, there is an option called ‘Design Optimization’. Unfortunately...

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DSP Builder with Mathworks SimPowerSystem toolbox

Hi guys, I'm want to use DSP Builder to construct a system in the loop with Simulink SimPowerSystem toolbox. In this system, a controller implemented on the Cyclone IV GX Development kit will interact...

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Cyclone IV GX Transceiver Starter Kit - getting started with PCIe

Hi, I have this kit (DK-START-4CGX15) and would like to use it to test the PCIe hard core and develop a Linux PCIe driver. I downloaded the "PCI Express High Performance Reference Design"...

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Avalon-MM / Linux

Hi, Thanks for taking time to read my request. I'm working on CycloneV devkit SoC. I make it run with Yocto/Linux. I was also able to make read on the lightweight HPS2FGPA bridge (connected to GPIO, in...

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MATLAB UART and Nios II

Hello, Can anyone help me explain why if I perform fprintf(s, '%s','103') in Matlab, and for Nios II char heatOutput[128]; while( !( uart_status & ALTERA_AVALON_UART_STATUS_RRDY_MSK ) ) {...

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SGDMA with pipeline bridge inside a Qsys subsystem

Hi I'm trying to get an SGDMA core to run inside a QSys subsystem which has its own sgdma desc memory. And the subsystem is connected to the outside system with nios using an avalon mm pipeline bridge....

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Cyclone V Transceiver Reconfiguration - Error 12252: wrong device family

In Qsys I'm connecting a reconfiguration controller to the PCIe hard ip in a cyclone V device using Quartus 13.0sp1. When synthesizing the design "Error 12252: wrong device family (Stratix V)" appears...

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Cyclone V Arm frequency?

Hello how can i check the arm frequency in a Cyclone V?? I can't find the information anywhere... All altera says is that it's up to 800 mhz but i don't know how can i set or check it in the design...

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Using on-board USB blaster to program other FPGAs

Hi everyone! I have a Cyclone III starter kit (DK-START-3C25N) which has the usb blaster embedded on-board. On the board there is also a 10 pins JTAG header. My question is simple but I did not find...

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problem with math.h 's function in Eclipse

hello, I made a system with Qsys which just contain a Nios II processor and its On-chip-memory. then , I use the .sopcinfo File generated by Qsys to create a nios II application with Eclipse. My...

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FPGA to communicate with webcam

Hi, I am not too sure whether this is achievable or not, but I am thinking to get the image from a webcam connected to any FPGA dev kit. But the webcam normally has its driver. My question is: is it...

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fwrite and UART RXData

Hello, I need some help. My Matlab code is as follows: fopen(s); fwrite(s,127,'int8'); A=fscanf(s,'%i'); B=fscanf(s,'%i'); B=fscanf(s,'%i'); fwrite(s,127,'int8'); fclose(s); However, when I try to...

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maximum payload allowed for hard Pcie-ip core with Cyclone IV GX chip

Hi, What is the maximum payload allowed for the Pcie-ip core? When i use the MegaWizard to generate a Pcie core it gives the choice either of 128bytes or of 256 bytes for maximum payload. i select the...

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Help using FIR II Compiler

Hello, I have a design in Quartus 9.1 that uses the FIR Compiler and want to move to Quartus 13 but FIR Compiler has been replaced by FIR II Compiler. FIR II is very different than FIR for example I...

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How to permanently program my Arria V GX?

Could someone please list out the steps? I would greatly appreciate it, thank you!

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SD card access

Is there some resource (eg datasheet) describing how to access an SD card from my DE2-115 board? The manual mentions using custom controllers to access the card in "SPI mode and SD Card 4-bit or 1-bit...

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Download Bitstream to Cyclone V by using the FPGA manager

Hi, I like to upload the soc_system.sof via the FPGA manager. I use the source code of the U-Boot. I have ported it to VxWorks. I use the Altera Evaluation Board REV B. . Before I begin to download the...

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Is a Quartus .bdf file can access a package (in WORK library) ?

Hi, I use a package in my Project to define some constants. I use some constant integers to access array cells. It works in vhdl files but not in the top level entity which is a graphic file (bdf)....

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Arria V performance Vs Arria II

Hi,Just wondering if any others out there had experienced poor timing performance from Arria V in comparison to Arria II ?We have a fairly standard but high speed RTL design which we used to run...

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New Development Boards by Startup

Hi All, My company is releasing two Cyclone IV E Dev boards, and a module system. I wanted to put links he for your information. *Disclaimer* Yes, I'm flogging a product, but I'm hoping to get feedback...

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