I have the output port width of 12 bits, and the intermediate result is of 14 bit width with the first 3 bits being sign bits (result of 3 addition). I need to remove the first two sign bits (no overflow) and assign the last 12 bits to the output port. However, I keep getting warning: connected to dangling logic, logic that only feeds to dangling port will be removed. How should I fix this warning?
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