Hello friends,
Am new to VHDL and the Quartus II environment. I like to know how to set the gain/reference value for a binary comparator at a fixed point of 8192. What range of STD_LOGIC_VECTOR would that be. I saw an existing code doing that, with a width 1 DOWNTO 0 for a 8192 decimal value, how possible?
Am new to VHDL and the Quartus II environment. I like to know how to set the gain/reference value for a binary comparator at a fixed point of 8192. What range of STD_LOGIC_VECTOR would that be. I saw an existing code doing that, with a width 1 DOWNTO 0 for a 8192 decimal value, how possible?