Hi,
I want to implement gigabit Ethernet port with Altera DE2-115 board having Marvell Phy(88E1111). An alterantive is to use IP core but its not free. I saw in opencore.org there is "10_100_1000 Mbps tri_mode ethernet MAC" project written in Verilog. There are several RTL files and simulations are given in this project. I understood little bit but I couldnt find the way how to use it and most important from where should I proceed. can anybody please guide me little bit?
or suggest me alternative if any.
I have Quartus and Modelsim both free version and couldn't manage to buy IP core.
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An FPGA Beginner
I want to implement gigabit Ethernet port with Altera DE2-115 board having Marvell Phy(88E1111). An alterantive is to use IP core but its not free. I saw in opencore.org there is "10_100_1000 Mbps tri_mode ethernet MAC" project written in Verilog. There are several RTL files and simulations are given in this project. I understood little bit but I couldnt find the way how to use it and most important from where should I proceed. can anybody please guide me little bit?
or suggest me alternative if any.
I have Quartus and Modelsim both free version and couldn't manage to buy IP core.
-
An FPGA Beginner