hi ...
there is fpga based logic analyzer at sump.org/projects/analyzer/
it is implemented on spartan 3.
i was reading and trying to understand how it is coded.
its sampling frequency is 100MHz at 32channels.
sampling freq = clock /d+1
where d is programmable register. its 24 bit register . i am unable to calculate its sampling freq according to formula ..
plz help me , for what value of 'd' the sampling rate will be 100 MHz ?
regards..
there is fpga based logic analyzer at sump.org/projects/analyzer/
it is implemented on spartan 3.
i was reading and trying to understand how it is coded.
its sampling frequency is 100MHz at 32channels.
sampling freq = clock /d+1
where d is programmable register. its 24 bit register . i am unable to calculate its sampling freq according to formula ..
plz help me , for what value of 'd' the sampling rate will be 100 MHz ?
regards..