Hello there. I am starter at FPGA. I've advanced digital design course at my M.Sc class. Lecturer give us a homework about on Quartus 2,creating schematic designs, graphical test vector and simulate it, simulating it via Modelsim at impelement designs to DE2 board and obversing the results. There are my schematic design, pin assigments and when I tried to make a functional simulating at waveform graph I got an error. Don't get confuse with the name of project. At firs I intended to design a 2x1 Mux with logic gates but then I just designed a simple circuit like that. What is my problem?
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