Configuring FPGA through EPCS (EEPROM) INCLUDING Nios II program?

Hello people!

I have made numerous VHDL applications where I configure the FPGA on boot via the EPCS (EEPROM) chip. So until now I know how to create a .jic file and save it to the EEPROM so that the program stays while power is off and be again reconfigured when powered on again.

Now I would like to create a small monitoring apllication in Nios II to communicate with the rest of the VHDL system through some parallel ports. My problem is that until now I have only seen in tutorials how to load the Nios II program on-the-fly using ALTERA Monitor Program.

Is there any possibility that I incorporate the Nios II program into the .jic file so that when I power on the board the Nios II program will get loaded in the on-chip RAM while the rest of the FPGA configuration is done?

Thanks