Hello
I am having some trouble getting the SPI interface on the HPS to read from an EEPROM (a fairly basic task).
It appears that the SPI peripheral allows up to 16-bit data transfer per frame. Subsequent data is transferred in the next frame. My problem is that the slave select line (active low, nSS0) is asserted between frames, this is not compatible with the EEPROM device on my board, which requires 16-bit command + address (master), followed by 8-bits of Rx data (slave), which need to be clocked out, see below datasheet.
Because the slave select is asserted between the master sending the command and the slave replying, the EEPROM is put into standby mode and ignores the command. Any ideas on how to force the slave select to be low during the entire transaction (24 bits)?
Datasheet: Figure 2-1 shows the read transaction,
http://ww1.microchip.com/downloads/e.../20002123D.pdf
I am having some trouble getting the SPI interface on the HPS to read from an EEPROM (a fairly basic task).
It appears that the SPI peripheral allows up to 16-bit data transfer per frame. Subsequent data is transferred in the next frame. My problem is that the slave select line (active low, nSS0) is asserted between frames, this is not compatible with the EEPROM device on my board, which requires 16-bit command + address (master), followed by 8-bits of Rx data (slave), which need to be clocked out, see below datasheet.
Because the slave select is asserted between the master sending the command and the slave replying, the EEPROM is put into standby mode and ignores the command. Any ideas on how to force the slave select to be low during the entire transaction (24 bits)?
Datasheet: Figure 2-1 shows the read transaction,
http://ww1.microchip.com/downloads/e.../20002123D.pdf