Hi,
I've got some very strange 'performance behavior' with a tightly coupled on chip memory used as data storage. In order to speed up my design, I've created a tightly coupled on chip memory where I calculate coefficient values while a DMA controller copies new data into another portion.
At my first attempt I've used the DMA synchronized by means that I wait for the dma to finish copying and then doing my calculations.
In my second attempt I copy while I do my calculations, but this gives me zero performance gain. How can that be? It almost seems as if the NIOS stalls while copying takes place.
Can anyone give me a good explanation on what's going on?
Thanks
I've got some very strange 'performance behavior' with a tightly coupled on chip memory used as data storage. In order to speed up my design, I've created a tightly coupled on chip memory where I calculate coefficient values while a DMA controller copies new data into another portion.
At my first attempt I've used the DMA synchronized by means that I wait for the dma to finish copying and then doing my calculations.
In my second attempt I copy while I do my calculations, but this gives me zero performance gain. How can that be? It almost seems as if the NIOS stalls while copying takes place.
Can anyone give me a good explanation on what's going on?
Thanks