I am trying to run a design with 2 stacked Terasic DE3 boards. One of the designs works when they are not stacked but NIOS hangs with some memory verify errors when they are stacked together. Does anyone know if I have unused pins on both the top and bottom of the same corresponding connectors (HSTC-A), for signals that I am not using, may I just delete them from the assignment and top level files and only use those I am using on both boards or should I still keep the assignments?
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