how to use terasIC ADA card with vhdl
Hi everyone, i'm using the terasIC High Speed AD/DA daughter card (http://www.terasic.com.tw/cgi-bin/pa...English&No=278) in combination with the DE1 (Cyclone II) board from Altera. Unfortunately i...
View ArticleWhen creating a SD card image, put own code there
Hello, I have created my own SD card image but how can I get my own code on there so I can run it? Thanks.
View ArticleSimple Sinus Generator VHDL - DE2-115
Hello, I am a complete beginner and I have a problem. I want to create a Sinus Generator in VHDL with my FPGA Board. The generated sinus should be displayed on the line out. But I have no clue, how to...
View ArticleSupport IEEE float package
Hi, Will Altera support the IEEE float package somewhere in the future for synthesis, so you do not need to add floating point cores, generated by Megawizard, but simply use VHDL statements like "*"...
View ArticleDDR Input Same Edge vs Opposite Edge transfer
Hi, Background 12 bit Serialized DDR data stream coming into the FPGA via LVDS at 960Mbps. 480MHz bitclock along with data channels being sent. 80Mhz frame clock too. I was wondering if it matters in a...
View ArticleLogiclock regions
Hi, i want to know if it is possible to use logiclock regions in any version of quartus ii without purchasing a software subscription.
View ArticleError (209062): Flash Loader IP not loaded on device 0
I am trying to flash my pcie385n_a7 using "aocl flash hello_world_131_pcie385n_a7.aocx" The command never completes because of the following error(s): Info: Command: quartus_pgm -c 1 flash.cdf Info...
View ArticleCould someone have an idea?
Ok. I have 4 modules that it depends on GPIO or Switch Hi or Lo module From_SPISlave() and module To_UART(); module From_UART() and module To_SPIMaster(); if (Switch is Hi) then I run the first:...
View ArticleUSB Blaster EEPROM Program for Cyclone IV Dev Kit
Hi, I have accidentally erased the EEPROM on my CycloneIV development kit and now the computer sees the USB Blaster as USB Serial interface. I tried to reprogram by using FTDI - FT prog and...
View ArticleMCU to program Boot-Prom
Hi All, as the title said. I want to use a MCU to program the Boot-Prom. I already have USB and SPI working on a MCU, so it would be easy to use this to program the FPGA. For the hardware, the...
View ArticleStacking two TeraASIC DE3 Boards
I am trying to run a design with 2 stacked Terasic DE3 boards. One of the designs works when they are not stacked but NIOS hangs with some memory verify errors when they are stacked together. Does...
View ArticleC++ support for AOCL
Does the OpenCL SDK support C++? If so, what are the limitations? The prorgramming guide isn't quite clear on C++ support (at least, from a quick glance-through)
View Articleaocx files for 2d fft example
Hi, I'm trying to debug an issue with the 2d fft example available for download here http://www.altera.com/support/exampl...cl/fft-2d.html I compiled the fft2d.cl file for several fft sizes (modifying...
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Doubts using stdio.h
hello everybody, i'm trying to read some data sent from my computer to my De2-70 through the UART port, i read the Embedded Peripherals IP user Guide and there was written in the page 6 of the chapter...
View ArticleBeMicro CV - Qsys starter project?
I give up: after much googling, I'm unable to find any starter Qsys-based projects for the BeMicro CV. Is anybody aware of anything I might be overlooking? I was hoping for NIOS+DDR3 Hard IP+PIO's for...
View ArticleCrash using "quartus_pgm" in SLF mode while trying to read EPCS
Hi, Using Quartus 13.0.1 in Linux, while tryring the following command which should "examine" the current EPCS, I got a crash with a stack trace. search on forums didn't give me clues about such error...
View ArticleShifted clock signal when connecting to FPGA (cyclone iii)
Hello, I am getting some strange behavior that I can't understand what would be causing the behavior. I have a 32MHz crystal oscillator that I've been trying to use as a digital clock signal to drive...
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pwm with varying frequency and clock
Hi, I am trying to write Verilog code to generate 1.a set of lower frequency clocks with certain step size from a 50mhz 2.then duty cycle varied each of these frequency In program 3 counters used....
View ArticleUSBblaster can not install on win8 system
Hello, I'm trying to install driver on a win8 system laptop, but it tells me that can not find driver. Is there a specific driver for win8, or the default driver that comes with the altera folder...
View ArticleQuartus2 13.1 64bit launch
Installed 32bit quartus2 , and then windows switched to 64bit from 32bit. How to launch 64bit quartus2? Regards Vraifluss
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