pwm with varying frequency and clock

Hi,

I am trying to write Verilog code to generate

1.a set of lower frequency clocks with certain step size from a 50mhz
2.then duty cycle varied each of these frequency

In program 3 counters used.
counter> to generate lower frequency clocks
counter1> to vary duty cyle
counter2>to select frequency value

in compilation itself there is error in code.please help me ....

Thankyou

Attached Files

• freqs.v (1.0 KB)