Hi,
I want to check pulses' fronts matching on two lines. These fronts are matched not ideally.
The synchronous variant also would be tested (matching the fronts during one period of Fclk 200MHz),
but I'm interested also in asynchronous one.
The short pulses are created asynchronously, when fronts of wide pulses come.
For this purpose I use DFF primitive, D-input is connected to Gnd, Q-output - to PRN-input,
fronts come to CLK-input. So when front comes, Q is set to L, so L on PRN sets Q to H
and short negative pulse is on Q output and simulator shows it.
To widen this pulse, I place even number of "NOT" primitives to increase delay,
but in simulator in both cases (with "NOT" primitives and without) pulses have the same width (O1 and O3 are the same, so as O2 and O4, but really O3 and O4 must be wider).
Would be included the primitives "NOT" in schematic, loaded to real device?
Or may be these "NOT" primitives would be excluded by some optimization?
If there is such optimization in Quartus II, how to set it OFF?
How to estimate the delay time, when few "NOT"primitives are serially connected?
Would be some difference in delay time when EMP3256ATI144-10 or EMP3256ATI144-7 is used?
The project archive (Quartus II), and images - schematics and simulation - are placed in attachement
I want to check pulses' fronts matching on two lines. These fronts are matched not ideally.
The synchronous variant also would be tested (matching the fronts during one period of Fclk 200MHz),
but I'm interested also in asynchronous one.
The short pulses are created asynchronously, when fronts of wide pulses come.
For this purpose I use DFF primitive, D-input is connected to Gnd, Q-output - to PRN-input,
fronts come to CLK-input. So when front comes, Q is set to L, so L on PRN sets Q to H
and short negative pulse is on Q output and simulator shows it.
To widen this pulse, I place even number of "NOT" primitives to increase delay,
but in simulator in both cases (with "NOT" primitives and without) pulses have the same width (O1 and O3 are the same, so as O2 and O4, but really O3 and O4 must be wider).
Would be included the primitives "NOT" in schematic, loaded to real device?
Or may be these "NOT" primitives would be excluded by some optimization?
If there is such optimization in Quartus II, how to set it OFF?
How to estimate the delay time, when few "NOT"primitives are serially connected?
Would be some difference in delay time when EMP3256ATI144-10 or EMP3256ATI144-7 is used?
The project archive (Quartus II), and images - schematics and simulation - are placed in attachement