Hi All,
I am creating a custom memory mapped device and need to create an 8k byte block of dual port RAM with write-only access from NIOS, and read-only access from the custom hardware side.
RAM needs to be internal to the Cyclone IV FPGA.
I have found a dual-port Avalon memory part within SOPC builder, but feel that I don't need anything quite as elaborate as Avalon on the custom hardware side.
Having said that, the custom hardware will be reading a byte every 8th clock cycle at 50Mhz, so I will need the Avalon / NIOS side to generate wait states should a bus conflict occur.
Any pointers appreciated before I go-chasing-my-tail for a week.
Many thanks,
Mark
I am creating a custom memory mapped device and need to create an 8k byte block of dual port RAM with write-only access from NIOS, and read-only access from the custom hardware side.
RAM needs to be internal to the Cyclone IV FPGA.
I have found a dual-port Avalon memory part within SOPC builder, but feel that I don't need anything quite as elaborate as Avalon on the custom hardware side.
Having said that, the custom hardware will be reading a byte every 8th clock cycle at 50Mhz, so I will need the Avalon / NIOS side to generate wait states should a bus conflict occur.
Any pointers appreciated before I go-chasing-my-tail for a week.
Many thanks,
Mark