Terasic DE2: Lot of jitter with default SOF, SRAM timing problems, related?

I don't know if anyone could help me with the following issue: when I load up the default SOF (blue background, ALTERA-logo etc) to my DE2 board, I have a _huge_ amount of jitter on the screen. I mean, scanlines are have noise and are not aligned. Also, with the same board I have problems with SRAM timing. The core I have been debugging is Minimig DE2 port and the system controller part, which uses the SRAM, has random memory errors (in my memory tester code which does write-verify for whole SRAM) - I have relaxed timing etc and the specific ISSI memory part is verified by others to work 100%. This leads me to suspect that a) 50MHz clock is bad, or b) I have voltage jittering. Could anyone tell me where to start looking for the problem?

Mikolas