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How to constrain my design

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Hi,

I'm not sure how I should constrain my design and which timequest commands I should use.

In my design there are 5 clock domains. The are clock domain crossing from 4 clocks to the 5th. So to clarify:

A, B, C, D and E are my clocks. Clock domain crossings are : [A <-> E], [B <-> E], [C <-> E] and [D <-> E].

There is only a single 32 bit databus crossing the clock domains and with the databus is a write strobe, which has been synchronized to the new clock domain.

I know, from calculations, that the shortest amount of time from the source write strobe to the destination write strobe is 12 ns. So I believe that my data needs to be stable before 12 ns in worst case.

But I'm not sure how I write this in my SDC file. I've been looking at the set_max_delay and set_min_delay, but I'm not sure how to use them properly.

Can someone please advice?

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