TTK .. having difficulties

http://www.alterawiki.com/wiki/Use_T...gnal_Integrity

Using this reference design ... I tried with Quartus 13.1 and 14.0 and in both cases after loading the .sof and starting the TTK , the GUI comes up but I fail to get to step 5. It implies the TTK can't detect the reconfig_controller in the design ..

Since this is a reference design, I am not sure what is up ... Quartus 13.1 indicates altpcie_reconfig_driver.sv needs to be updated and 14.1 requires a re-generation of the RTL.

Any ideas ?

Thanks, Bob.

Steps to run TTK

1. Open the project in Quartus, must be 13.1 or later, installed in the computer which is connected to the FPGA through the USB blaster.
2. Under pull down menu, select "Tools/System Console/Transceiver Toolkit", it opens the TTK window.
3. Select "Transceiver Toolkit" tab.
4. Select "Receiver Channels" tab, it allows you to measure and control the RX.
5. Select the "reconfig" file in reconfig path pull down menu. If you don't see any file, it means the TTK can't detect the reconfig_controller in the design. Re-check the connection between the JTAG-to-AVMM Master and the reconfig_controller in Qsys.
6. Add the channel number you want to measure or control into the field at the end of the Reconfig path.
7. Click "Create Receiver Channel" icon to create the requested channel.
8. Click "Control Receiver Channel", it opens "Receiver: Rx_channel_x" window.
9. If the link speed is in Gen3 and the link is trained through standard PCIe link training, include EQ phase, the "Equalization Mode" should be in "one-time adaptation" as shown below. The value in "Equalization Control" field reflects the current RX CTLE setting. If the FPGA is Gen1 or Gen2 capable, since the AEQ is not enabled, so it does not show the "Equalization Mode" and the "Equalization Control" value is 0.