Cyclone IV E stuck in POR
My Cyclone IV E (EP4CE6 E144 package) is in a weird state. I have pullup resistors on CONF_DONE, nSTATUS, and nCONFIG. nCE is pulled low. All four of these pins have low voltage readings. (< 20 mV)...
View Articleprecision for a cos(x)/sin(x) lookup table
I am thinking to make a table for the calculation of cos(x)/sin(x). I know this could be a very large table if I want the precision to be high. Generally speaking, what is the phase step (x = x+step;...
View ArticleReconfiguring a Transceiver using Streamer Based Reconfiguration
Hello everyone, I have instantiated a receiver using the "Arria V Transceiver Native Phy Core" at 1.25 Gbps. I would like to simply change the data rate from 1.25Gbps to 2.5Gbps. In order to do so, I...
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Avalon MM Master BFM unusual Behaviour
Dear Reader, I try to simulate the behavior of my Avalon MM slave code. Avalon MM slave is part of my DUT which has a ROM and RAM memory connected. Avalon Master BFM is part of my test bench. here i...
View ArticleModelsim Save Force Value
in Modelsim; Can i somehow save Clock value or Forced value of a wavesignal (including it's delay value)? because i don't want to reenter it every time i restart simulation.
View ArticleComparison with 0 or 1, to detect high impedence
Hi, I know that its not allowed to compare with 'X' or 'Z' in a synthesizable VHDL code. But is it allowed to write a code in which I compare a signal to '0' or '1' to detect an 'Z' and suspend the...
View ArticleDDR2 Timing
I have a Cyclone IV design with Nios and a DDR2-RAM connected to the Nios. There is an .sdc file generated by Quartus named "CPU1_DDR2_phy_ddr_timing.sdc". I think it is generated with a script. Do I...
View ArticleIssue with polling in Nios
Hi, I've got a custom component that produces some results from time to time, I want Nios processor to monitor the process by polling and whenever a result is produced, it is written to a external...
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Nios II problem with DDR core SOPC builder
Hello all: I am currently transitioning a Quartus 8.0 (subscription edition) project to Quartus 12.1 (web edition). I am facing couple of problems: 1. The NIOS II Eclipse tool does not run the code...
View ArticleCustom IP core timeout
Hi, Perhaps someone out there can point me in the right direction to determine how you can add hardware timeout to your own custom IP core targeting Stratix-IV. Thanks, Jeff
View Articleclock divider with counter
Hey guys, I am trying to design a counter . First of all, i have a clock divider block which will take on-board clock of 50 Mhz and will change it into frequency of 1Hz. The output frequency of 1Hz...
View ArticleHow to load ELF on the board? / U-boot with Ethernet support for SocKit ?
Hi guys, I have an access to SoCKit by Terasic. I've noticed the kit came with Linux, which works fine. However I have some standalone bare-metal ELF files I'd like to try to run on the board. U-boot...
View ArticleCyclone V SRIO interface
Hello, I am trying to connect a Cyclone V FPGA to a TI 6678 DSP using the Differential SRIO lines on the HSMC, but I can't find any documents/example code that shows how to store the data from the FPGA...
View ArticleHow can i check the arm frequency inside the cyclone V?
Hello i can't find a way to check the arm frequency inside the cyclone V SoC.
View ArticleExtract CPLD Max7000 Program with JTAG port
Hi, I have a problem to extract the program of the CPDL Max7000. I made a JTAG cable like the "Byteblaster" of Altera for testing and in-system programming this CPLD. Currently I can put this device in...
View ArticleAN502 SMBUS protocol - help needed!
Hi, Did anybody tried using the AN502 design example of SMBUS? I'm having huge problems understanding it... I have 2 masters so I'm using the arbitration mode of this design, and I can't figure out...
View Articlevectors in VHDL
hi every body do u know how we can have vectors with different length in VHDL? the number of my vectors and their length depend on a parameter such as N. thank you.
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vectors in VHDL 2
hi every body im new to vhdl i wanna write a code for this picture but for its N-scale [IMG][/IMG] so i need to have N vectors with different length.N is a parameter. how i should write the code?
View ArticleTimeQuest timing relationship for unrelated clocks
Hi, I would like to know the best way to handle a particular TimeQuest situation. I have two clocks whose nominal frequencies are related (either the same or some rational multiple) but they come from...
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