hold req and hold ack for nios II processor
We want nios II processor and glue logic interfaced with an external RAM using same data bus and address bus . We want to hold the processor bus when my glue logic is accessing the external RAM and the...
View Articlequartus 7.1 web edition
hi all, im new to quartus and im trying to download quartus2 V7.1 web edition, yea i know its old but this is the version that i need. im trying to download it through the altera website but without...
View Articleefficient large matrix multiplication in Adv DSP builder
Hi There are a lot of large matrix multiplication in my application. Thanks for any suggestion and example on design of efficient large matrix operation in Adv DSP builder. Jiuxiang
View Articleplease help me out with instatiotion problem
i have problem abt the instatiotion, when i run the code i got this message from the quartus II...i make it red where it detects the error...please help me Error: Node instance "COMP1" instantiates...
View ArticleExternal circuit connection
Hi, I want to connect an external circuit to UP1 board (Flex10k). How the connection should be? what is the common (anode/cathode) for the external circuit? The external circuit contains 7 segment,...
View ArticlePlease help to fix the errors
Hello, When I run the code, I got these errors: Error (10476): VHDL error at controller.vhd(105): type of identifier "max_add" does not agree with its usage as "std_logic_vector" type Error: Quartus II...
View ArticleWhat is the ip of web server of ethernet 0 or 1 example in demons folder DE2-115
1. What is the ip of web server of ethernet 0 or 1 example in demons folder DE2-115? 2. Where do the web server c code stored in DE2-115?
View Articlewhat's going on with Arria V
Guys, I need some reasonable explanation for this before I shoot an SR to Altera. I'm using Quartus 12.1, the greatest supposedly. I have exactly the same design, written in behavioral code, no...
View Articleslv
hi . i saw a code . it has some declarations like datain : in slv16; dataout : out slv16; reg_bus_out : in reg_bus_out_type); what are these .. plz reply .. regards
View Articleprogramming cyclone IV with microcontroller
Hi this is franticAF and this is my first post. I'm working on board where an Altera Cyclone IV EP4CE6E22I7N is mounted (with attached flash memory EPCS4). A microcontroller is also present in order to...
View ArticleFFT megacore 8.00 urgent help me
I'm making a project under the theme OFDM, but now I'm blocking Regarding the FFT block in Quartus II MegaCore 8.00 but if I can attack my FFT block a signal (NCO) just test output remains unchangeable...
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possible constraint problem (source sync input to fpga)
Hello, I had thought I had my source synchronous input properly constrained, but I recently added some logic to another part of my design (signaltap, and some other stuff), and now I sometimes see...
View ArticleCyclone III DSP Development Kit - pin assignments to audio codec
Hi, I am working with Cyclone III Development Kit, 3C120 FPGA device, Quartus 9, and I am trying to program a simple audio loopback project using TLV320AIC23 audio codec, which is placed on HSMC data...
View ArticleHelp with audio codec
Greetings I got this code on verilog hdl high speed pusuit which you can find in 'fpga4fun dot com' / musicbox2 dot html and it works perfectly, the thing is I want to make a circuit which includes...
View ArticleDrive a net with Signal Tap
My understanding is signal tap doesn't have the option of driving a net/pin, which would be very helpful. My question is why?! :) it's a neat feature and should be added IMO.
View ArticleCyclone IV GX starter kit SSRAM access
Hi, if anyone made the link work, could you share a link or some tips? I checked the schematic. It seems the control signals to the ISSI SSRAM need to go through the MAX II chip(EPM2210) since the...
View Articlemusic box problem
Hello..please help me..i have to do a project about music box in vhdl..but i have a problem after finished it..the sound was not clear..there are some 'noise' with that sound..i'm using only DE1 board...
View ArticleMusic Box Problem
Hello..please help me..i have to do a project about music box in vhdl..but i have a problem after finished it..the sound was not clear..there are some 'noise' with that sound..i'm using only DE1 board...
View ArticleNewbie looking for a "Blink-the-LED" tutorial
Hi All, I am a complete newbie in FPGA but have some experience in playing with circuits and MCUs. Recently a friend of mine passed me a BeMicroSDK stick. I have installed Qartus and finished the PDF...
View ArticleNTSC/PAL/SECAM Video Decoder output (BT656) to RGB
Hi, I need help, how to get started in converting BT656 Video format to RGB using Quartus "VIP" Core using Qsys I have started looking in "TVP5150AM1" - NTSC/PAL/SECAM Video Decoder, which takes...
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