I'm trying to set up a small demo to make a stepper motor move in various ways in which I'll need a series of buttons to control the action of the motors.
To do this I'm using a state machine to perform the required actions depending on the button press, however some of the states aren't continuous and need to drop to another state after completion of the action. The trouble is I'm getting errors. I kinda understand why the compiler doesn't like it, but I don't know how to circumvent the issue, so suggestions welcome.
Also, it would appear that I'm not getting the desired clock signal on my step_clk output, which also confuses me greatly.
Edit: So apparently if I put the 'sw' case statement within 'if rising_edge(clk_div)' statement I don't have a problem, but the only downside is that's not ideal if the clock were to be going a few Hz.
To do this I'm using a state machine to perform the required actions depending on the button press, however some of the states aren't continuous and need to drop to another state after completion of the action. The trouble is I'm getting errors. I kinda understand why the compiler doesn't like it, but I don't know how to circumvent the issue, so suggestions welcome.
Also, it would appear that I'm not getting the desired clock signal on my step_clk output, which also confuses me greatly.
Code:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity motor_demo is
port( clk: in std_logic;
RST, EN, CTRL, HALF, CW, Step_clk: out std_logic;
sw: in std_logic_vector(0 to 4)
);
end motor_demo;
architecture stm of motor_demo is
type motor_action is (STOP, CWISE, CCWISE, CW_45, CCW_180);
signal motor_state: motor_action := CWISE;
signal stepcount: integer := 0;
signal clk_div: std_logic;
begin
-- Clock divider for stepper action
clk_divider: entity work.clk_divide port map(clk, clk_div);
process(sw) is
begin
case sw is
when "01111" =>
motor_state <= CWISE;
when "10111" =>
motor_state <= CCWISE;
when "11011" =>
motor_state <= STOP;
when "11101" =>
motor_state <= CW_45;
when "00001" =>
motor_state <= CCW_180;
when others =>
motor_state <= STOP;
end case;
end process;
process(clk_div, motor_state) is
begin
if rising_edge(clk_div) then
case motor_state is
when STOP =>
step_clk <= '0';
stepcount <= 0;
when CWISE =>
step_clk <= clk_div;
CW <= '1';
when CCWISE =>
Step_clk <= clk_div;
CW <= '0';
when CW_45 =>
CW <= '1';
if(stepcount < 49) then
step_clk <= clk_div;
else
motor_state <= STOP;
end if;
stepcount <= stepcount + 1;
when CCW_180 =>
CW <= '0';
if(stepcount < 199) then
step_clk <= clk_div;
else
motor_state <= STOP;
end if;
stepcount <= stepcount + 1;
end case;
end if;
end process;
end stm;Code:
Error (10028): Can't resolve multiple constant drivers for net "motor_state.STOP" at motor_demo.vhd(52)
Error (10029): Constant driver at motor_demo.vhd(31)
Error (10028): Can't resolve multiple constant drivers for net "motor_state.CWISE" at motor_demo.vhd(52)
Error (10028): Can't resolve multiple constant drivers for net "motor_state.CCWISE" at motor_demo.vhd(52)
Error (10028): Can't resolve multiple constant drivers for net "motor_state.CW_45" at motor_demo.vhd(52)
Error (10028): Can't resolve multiple constant drivers for net "motor_state.CCW_180" at motor_demo.vhd(52)
Error (12153): Can't elaborate top-level user hierarchy
Error: Quartus II 32-bit Analysis & Synthesis was unsuccessful. 7 errors, 5 warnings