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aud_ws_in signal in SDI audio extractor
Hi The aud_ws_in signal in SDI audio extractor is used as a reference word select signal to align the serial outputs of multiple audio extractors. (please see SDI use guide for the original...
View ArticleInterfacing STRATIX 3 FPGA with RS485 and RS232.
Hello sir, I am designing a hardware multipurpose board using STRATIX 3 FPGA(EP3SL340F1517C3N). I have never worked on Fpga practically. So kindly let me know how to interface this Fpga with RS485 AND...
View ArticleSGDMA's alt_avalon_sgdma_construct_mem_to_mem_desc_burst driver
Hi, I could not find much information about alt_avalon_sgdma_construct_mem_to_mem_desc_burst device driver. I have been using alt_avalon_sgdma_construct_mem_to_mem_desc driver in my applications. Does...
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Displayport Auxiliary Channel Receiver
Hi all, I'm trying to decode a DisplayPort Auxiliary Channel signal with my EP4CGX22. I'm using the input termination as required by the standard: DP_AUX_RX.jpg C_aux is 100n and Vbias_RX is 3.3V. The...
View ArticlePort Connection Error: Output must be connected to a structural net...
Hi All, I'm getting a frustrating error that appears to be a incorrect syntax involving wires vs reg but i've tried all combinations and can't solve it. So i'm after any help you can please provide....
View Articlevhdl code for tic tac game
i am going to do project on simple game tic tac on vhdl. I am using 9 switch and and nine led for display and 2 led to indicate the winner. i am thinking to distinguish to play by flashing of LED. if...
View ArticleClock generate by C-Code
Can it be possible to generate a Clock of 1 Mhz/ 125 Kbps from Code in eclips environment. I have altera DE2_115 board, working on clock rate of 50Mhz regards kaushal
View ArticleButton press to change state machine - "Can't resolve multiple constant...
I'm trying to set up a small demo to make a stepper motor move in various ways in which I'll need a series of buttons to control the action of the motors. To do this I'm using a state machine to...
View ArticleByte Enabled RAM Issue
Hi, I am facing an issue while using byte enable memory. My memory is 128-bit widedual clockedread clock runs at 400MHz while write clock runs at 200MHzIts depth is only 2 i.e. read and write addresses...
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VIP demo with PAL on NEEK (EP3C25F324C8)
Hello, I'm actually an engineering student and I have a project (video processing on altera). Based on VIP demo "AN427" I'm trying to build a system that streams a PAL video input on a 800x600 VGA...
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Power schematic for Cyclone IV
Hi, i am designing a very simple development board and need some tips on Cyclone IV power design. The board will be used for learning purposes with simpled designes. It is not aimed for very fast...
View ArticleModelSim-Altera Starter Edition (Free) - Download Failure
I am a teaching assistant for a class using the Quartus II Web Edition installer for the Quartus II Web Edition (free) with Cyclone IVE device family and the ModelSim-Altera Starter Edition (free). A...
View ArticleQsys-based example design for a Cyclone V GX Dev Board
Hi, I'm struggling to get DDR3 accesses working on the dev board and am wondering if anyone has a Qsys-based design working yet. Basically, I get an error when I attempt to download my .elf and receive...
View ArticleAny examples for set_instance_assignment -name DUPLICATE_ATOM
I am trying to speed up my design. I have a large fan out clock enable signal that goes through a combinatorial logic. I do not want to pipeline the signal. I see that it is possible to duplicate...
View ArticleVerification failed for device number (Quartus programmer, verify option)...
Hi, I have search the web and found couple of places speaking about it (Verification failed for device number (Quartus programmer with verify check)) but still I'm not satisfy with what I have read :(...
View ArticleVIP Frame Buffer Locks
Periodically, especially immediately following a Reset to my VIP system, one or the other of the 2 independent frame-buffers hangs up. I have SignalTap on the DoutValid and DoutReady signals throughout...
View Articlevhdl for reading pwm
hi i'm using ultrasonic sensor to detect water level and implement on De2 board. The output of the sensor is in pulse width which is 147uS/inch. Can anyone guide me how i can write the vhdl code for...
View ArticleWalkthrough Jam STAPL Player / JTAG / GPIO / ARM
My problem is that the verify option with the jamplayer fails (Exit code = 11... Device verify failure), see at the end the output... But to add more context and extra details here my walkthrough:...
View ArticleNios II timer and erroneous usleep() results
I am using a Nios II processor running at 50MHz with a timestamp timer and a system timer. I am noticing that the usleep() function is not returning expected time delays. For the code: frame_start_time...
View ArticleCyclone IV E JTAG issues - VCCA voltage level
Hi all, I have a custom board with Cyclone IV E (EP4CE115-F484). I am trying to access it via JTAG from Quartus, but keep receiving the "Error: Can't access JTAG chain". I check the Quartus and USB...
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