RYSC Plug: The Slithy Toves
This has nothing to do with Altera, so can be considered spam, but as a long time poster to this forum, as well as various posts to the wiki like the TimeQuest User Guide, I hope I can get away with...
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Quartus archive project from 13.0 does not load in 11.1
I have archived my Quartus project and generated a ".qar" file. When I restore the project in Quartus 13.0 everything works, but when I try to restore the project in Quartus 11.0 I am receiving an...
View ArticleST FIFO question
Hello, I need to interface a 16-bit 12MHz AD with a Cyclone II. The data comes from the AD in 8 data ports, it sends the MSB on the rising edge and the LSB on the falling edge of the 12MHz clock. I...
View Articlecalculating eigenvectors and eigenvalues
Hi there, i have a real,general high order matrix stored in a 2-dimensional array in nios's memory.and i need to find all of its eigenvectors and eigenvalues.
View ArticleModelsim error on compiling Avalon BFM turorial
Hi, I am trying to understand how to use the Avalanon Verilog BFM models. I just generated a testbenhc using Qsys as instructed in the Avalanon BFM tutorial. When I go to run the simulation I get the...
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Fitter Error
When running Fitter(Place&Router), I get the error: Can't place multiple pins assigned to pin location Pin_K22 (IOPAD_X77_Y33_N14) But when I check my pin planner, there is only one signal assigned...
View ArticleModelsim Error: (vcom-7) Failed to open design unit file "..." in read mode
Dear all, There is an error I need your suggestions: Error: (vcom-7) Failed to open design unit file "directory/file name" in read mode. Can you inform me how I can overcome it? I am using ModelSim...
View ArticleLooking for I2C drivers info for the Arrow SoCkit.
Hi all, Yes, this is my first project working with the SoCkit, and my first time with Linux as well so IÂ’ve got a lot to learn. IÂ’ve gone through the HW and SW labs, and can boot Linux and attach and...
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Problem Running Nios II Design Standalone
Normally I use HDL for everything, but IÂ’m trying to move into soft processor and SoC design. I created a Quartus/Qsys project to run the Nios II Binary Count example code project on a DE0-Nano...
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Onchip memory
Altera Cyclone II DSP development board (EP2C70F672C6).We r doing image processing. we have seen test pattern generation, which is available on this website. It is working fine but we r unable to...
View ArticleStrange error from aocl diagnostic
I am trying to use OpenCL code with a Terasic DE5Net FPGA. The code compiles but the host program has errors, When I was trying to troubleshoot I went ahead and used command Code: aocl diagnostic which...
View Articlewhich cyclone?
I am new to Altera devices. I am trying to decide between Cyclone 3, 4 and 5. But still confused. My main requirements are - Number of IOs: Same package/footprint should be available with higher IOs...
View ArticleNios II basic
Hi, I am a beginner .I am using Nios II development kit stratix II Ep2s60f672c3n. In the flash memory of board contains nios file.while power on file transfer to fpga... It means can I directly program...
View Articleto start nios on nios development kit
Hi, To start nios II IDE ,tool>sopc builder but in quartus II 13.0 and later version in tool, no sopc builder option available.so which option to click to start nios II IDE. Please reply Thank you
View ArticleSize of C file running using NIOS II ON CHIP RAM
How to figure out how much amount of space is being occupied by the C.c file which is used to to run as an NIOS II hardware ?? For example in the file...
View ArticleProblem with design project for Quartus (device - MAX II)
Hellow. I want develop some project on EPM570GM100I5N (MAX II family), but I can't find this device (and other G MAX II devices ) in Quartus II 12.1sp1 Web Edition (64-Bit). How can I solve this...
View ArticleHex to Mif file converter for LM32 Hex files
I have ported the LatticeMico32 to an Altera Cyclone. I have a 8K x 32 memory but the hex file I have has 4 words per line and I get the following line while trying to compile in quartus II 13.1...
View ArticleAltera EP1C12Q240C8 model for Multisim database or Altium Designer?
I am drawing schematic as EP1C12Q240C8, But cant find out this chip in Multisim or Altium Designer database. Where can I find it? or I have to design by myself? :confused::confused::confused: thanks!
View ArticleQuartus II Supported Devices by release version
Hi, I have been looking through the Quartus release notes to find out the highest revision of Quartus II that supports a particular CPLD (Max EPM7128S). The release notes seem to list the new devices...
View ArticleTerasic DE4 - SDRAM 4GB IP sample
Hello there, I have a Stratix board Terasic DE4 and want to run SDRAM 4GB that I have. But I couldn't find any information, or sample to use SDRAM in Qsys or SOPC. I have DSL 4GB brand name. Do I need...
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