SerialLite II channel_up drops to '0' on burst of data
Hi, IÂ’m trying to bring-up a Transceivers link using the SerialLite II protocol between Stratix 4 (EP4SGX230KF40C2) & Arria 2 GX (EP2AGX260EF29I5) FPGAs. The FPGAs are placed on different PCBS: The...
View ArticleBRAM in QuartusII
Hello, How can I write a BRAM in Quartus? I had been working with ISE and don't know how to define a BRAM in Quartus. Thanks
View ArticleEPF10K10 embedded memory blocks
Hi! According to the documentation the Embedded memory blocks are a standard '256x8 bits' and can be cascaded to make larger / wider memory blocks. I'm currently using only 256x6-bits (instead of 8)...
View ArticleEPF10K10 area optimization
Hi! I've noticed a couple of interesting things working with the (yes, old!) EPF10K10 and was hoping that, since it's a mature / vintage device, people could share some area optimization techniques. So...
View ArticlePCIe PIO Beginner Questions
I've been pouring over the documenation, examples, and forums for information on PCie HIP implementation and I'm still really struggling here so I'm hoping someone can help me in my first battle with...
View ArticleQuartus and SignalTap & Memory Editor
I have been running Quartus 64 Bit, Version 12.1, Build 177 for windows. What I'm finding is that Quartus crashes frequently when I try to use Signal Tap and the In System Memory Content Editor at the...
View Articleproblem sdram controller read/write FIFOs. NEED HELP !
hello all Please i need your help , i've been strugling with this problem for a while. well i would like to display two images on a vga screen. and i'm using the sdram to temporarely save frames before...
View Articlecomponent alt_dspbuilder_DFFEALTR
Hi I have problem with this component alt_dspbuilder_DFFEALTR from altera library. When I use it the Quartus write me Error (12006): Node instance "m" instantiates undefined entity...
View ArticleEPCS controlller does not get the Flash Transmit ready in bootloader
I am implementing a altera bootloader for multiple image (#image0(default) and image 1) I have the custom bootloader in internal memory of my nios processor which is loaded in case there is a an...
View ArticleUsing Flash Programmer to download NIOS II Project into FlashMemory
Hello, My first (quite big actually) NIOS II project is about to be delivered, and I have some doubts regarding the process of download of the SW project into flash. I don't have NIOS II licence at the...
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clock skew vs clock latency
Hi everyone, I have a question about the different results of specifying clock skew vs. specifying clock latency in SDC. As pointed out by Rysc in his popular manual TimeQuest User Guide and also in...
View ArticleHow to Set environment valiable on LINUX plateform for Quartus
Dear Friends, I am trying to work on Linux RHEL-6 plate-form for Quartsu 9.1SP2. now i am trying to set environmental variable using following command export PATH=$PATH:/opt/altera9.1sp2/quartus/bin...
View Articleusb blaster and ep2c5 mini board - jtagconfig hangs
Environment: quartus 10.1sp1 (linux) Trying to set up an ep2c5t144 mini board with usb blaster clone (zrtech brand). I connect the usb blaster to usb host first, then to ep2c5 board, then power up the...
View ArticleHow to deal with on chip memory timing?
I want to make a fsm on an altera FPGA which uses on-chip memory. I want to take an input, get data from memory based on input, use that data in the next cycle. and so on. What is a good way to write...
View ArticleJam STAPL Player version for Cyclone IV
I have a Jam STAPLE player version 2.3 that I modified by editing jamstub.c so it would operate in my environment. I have been using this since 2005 to configure Cyclone and Flex 10K devices. This...
View Articleorcad library symbols cyclone V
Hi all, I need the orcad library symbol of altera cyclone V 5CEFA5U19I7N Here I found some symbols altera.com/download/board-layout-test/pcb/pcb-cadence.html How do I find the others? thank you
View ArticleProblem with Pixel_Buffer_DMA and SDRAM
Hello guys. I have an Altera DE2-115 dev. board and I'm trying to use NIOS to display some images on a monitor, using the VGA connector on the board. I'm using quartus 11.1 and I'm following...
View ArticleArria II nSTATUS pin stays low ... for ever !
I am sure I am doing something stupid but this is beginning to bug me now so just in case someone has any fresh ideas....... I am working on a new board design which uses an Arria II GX and also an...
View ArticleDDR SDRAM on the Nios Development Board, Cyclone II Edition
I cannot make this work under QU12.1 and QSys. Memory is MT46V16M16. If I add the SDRAM Controller to the System it implements all but the DQS0 and DQS1 wires ??? The Ref Designs don't help because the...
View Articlepwm input
hi, i'm using an ultrasonic sensor for my project where the sensor has PWM output. i would like to connect the sensor to de2 board. i'm already done the programming part. can anyone helps me how to...
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