Arria II Power Supplies - Switcher or Linear?
Upon reading through the Arria II Device Family Pin Connection Guideline document (PCG-01007-1.5), we noticed that only switcher power supplies are used in the power tree examples for the VCC (0.9V)...
View ArticleConnectivity with the SPI interface to MAX II CPLD
Normaly the JTag interface is used to program and control the CPLD. Can I use the SPI interface to do the same thing ??? Cpld EPM570T144C4. I beleve the SPI interface is only used for talking to...
View ArticleChanging the play back rate of a buffer in C?
Hello! I am using an Altera DE2 FPGA board and running Quartus II, Nios II (V10.1). I loaded the Terasic V1.6 demo "DE2_SD_Card_Audio." Currently, I can play a .wav file from the SD card to the Line...
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fopen("/dev/uart","w") returning NULL
Hey guys, I'm attempting to communicate between my PC to the Nios II via RS-232. I've built up my system in SOPC and I'm using the eclipse tool to code in c. When I use the function fp =...
View ArticlePLL Critical Warning when generating less than the Max frequency
hi , am using simple PLL instantiated with input of 50MHz and generated a 5KHz, but am getting this below critical warning "Critical Warning (176584): Output pin "pll_5KHz" (external output clock of...
View Articlede2 vs. de2-115 for student studying computer vision
I have read through the specs but I am not far enough along in my learning to know whether the DE2 is plenty enough for my needs to pursue computer vision, animation rendering and other random projects...
View ArticleLogic Reset Input at Cyclone IV FPGA
Hello, i am designig a board with a cyclone IV FPGA that will have an exteran switch to reset the logic. Is there any advantage on using a dedicated clock pin for such task? I am considering that as i...
View ArticleFIR filter design with IEEE 754 half-precision floating point
Hi All We are in the initial phase of a project which implements processing of biomedical signals. I am trying to implement FIR filter with IEEE 754 half-precision (16-bit) floating point arithmetic....
View ArticleFrequency of operation of M9K bram
Hi, Does anybody know where/how to find the operating frequency of a block ram? I particularly need M9K and M10K. I was not able to find them in the altera documentation. Kindly let me know if you have...
View ArticleTimeQuest Definitions
Can someone point me to a resource that defines the terms cell, IC, uTco, uTsu that TimeQuest uses in its Data Path Type column? I can guess at the definitions but I'd like a source to quote. Thank you
View ArticleQuartus and NIOS launch in Ubuntu 12.04
Hi, I have installed Quartus II 12.1sp1 on Ubuntu 12.04LTS. I was unable to launch Quartus from the Dash. I found it in the /home/username/altera/12.1sp1/quartus/bin folder. I now have to launch it...
View ArticleFiles seem to be missing from Qsys synthesis of UP entities
Gentlemen, I am working on a Qsys project involving the UP 16x2 LCD display and 3 UARTS on a DE2-70 board. The Qsys generation of the NIOS processor works fine with no errors or warnings. However, when...
View ArticleFPGA instability after reset
Hi all, I am working with a custom Cyclone IV E based HW that is suffering from strange startup instability. The HW runs fine under various stress tests and temperature ranges when programmed through...
View ArticleAvalon Streaming new component in SOPC (VHDL)
Hello everyone, I am trying to create a new component to be integrated in the SOPC builder which performs, as a start, a color inverting operation. I've built a system using Test pattern generater and...
View ArticleProblem with my_first_fpga_tutorial
hi all, when i try to do this tutorial: www altera.com/literature/tt/tt_my_first_fpga.pdf I have always the same problem, once i try to use the megafunction wizard to instantiate a PLL (Chap: Add a PLL...
View ArticleHow to power the DE0-nano board with additional Li-on battery?
Hi, Is there any way of power the DE0-nano board with additional Li-on battery? and if it can be done, how could I monitoring the remaining capacity of the battery on board ? any suggestions ? Thanks!...
View ArticleCan't generate netlist output files
hi, am using TSE mac ip for my project, while compiling upto timequest timing analysis it was succesfull, SOF file is also created, but in EDA netlist writer am getting this below error. "Error...
View ArticleTHDB-ADA pin assgnments for DE2-115
Hi, As the title, I have problem with my pin assignment for my DE2-115 board :( 1. The HSMC from THDB-ADA has 192 pins (QTH-090-01-L-D-A) 2. The HSMC from DE2-115 has 172 pins (ASP-112952-01) 3. The...
View Articlecreate application project for nios2 in eclipse environment
Hi! 1. How will i create application project for nios2 linux in eclipse environment. 2. How will i compile and port? 3. Any hello world application for this?
View Articlealtera CRC after configuration
Hi, i've a board mountig an fpga altera cyclone 4 and uC connected to fpga with 16 i/o pins. In order to program the fpga i've created a software spi, based on SRUNNER, connecting the epcs pins to uC...
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