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Object Detection Implementation CNN

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Hi, everyone.

Currently, I am doing research on CNN object detection implementation using opencl and fpga.
But, i wonder is it any example code/library provided by Intel Altera?

Thank you

Using Differential Inputs to Evaluate an Incremental Encoder

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Hi,

I would like to read in and evaluate the signal of the incremental encoder from a motor.
I have the Deca Max 10 board; the signal input has a maximum of 2MHz.(Depending on engine speed)


When the engine is running slowly, everything works fine. But if the engine is moving faster, i start miscounting the signal. I suspect it's because the signal gets worse with increasing speed.

Currently I use simple IOs for the incremental encoder signals (A, A ', B, B'). I hope to get the problem under control by using genuine differential IOs of the FPGA. Do you think this premise is right?


Currently I fail in this task.
There are a few documents that deal with this topic but these confuse me more than they help

The documents are probably aimed more at people who are already very familiar with the technology
https://www.altera.com/en_US/pdfs/li...g_m10_gpio.pdf
https://www.altera.com/en_US/pdfs/literature/hb/max-10/ug_m10_lvds.pdf



Are there perhaps documents that explain the different IO-standarts(for beginners) or even better a tutorial that explains how to implement / instantiate a "real" differential input?

Is LVDS the right IO standard for my purpose? And how can this be created in the Pin Planner. If I set a pin as LVDS, the pin-planner automatically creates the second input. E.g. a -> a(n).
But I can not use a(n) in the code.

Is it sufficient to specify the IOs as LVDS, or do I also need to instantiation an IP core from Altera GPIO Lite?
Currently, i implement the diffenrential function with simple code like this: a_diff <= a_p and (not a_n);


I'm stuck right now. What do I have to do? Where can I read what to do.
I hope someone can help me or provide a new approach.

Kernel Report Occupancy

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Hi mates!

Im struggling to understand what the occupancy means.. for my understanding its the amount of time spent by the kernel doing a memory access. Is it right?

So if my occupancy its 100% it says that im doing to much accesses?

Cumps

Using relative include path with NativeLink?

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Hello all!

I've setup a Quartus Project (using Modelsim-AE) and moved all include files to a subfolder "./inc".
I also added a relative include path using this command:

set_global_assignment -name SEARCH_PATH ./inc

This works fine but my problem is: When starting a RTL simulation(via NativeLink)
Modelsim doesn't find the include files.

Is there any option in QuartusII to setup NativeLink such that ModelSim finds the inc files
at their new location?

Intel HLS (High Level Synthesis) compiler

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Hello all,

I am using Intel HLS compiler Quartus Prime Lite edition and going through solved examples to learn more about the tool.
Has anyone implemented a particular example in Intel HLS which has C++ templates in the code ? To be more precise, I am looking for an example which fits generic programming coding style (in terms of data types)....

I will be grateful if anyone has tested one such algorithmmmm

Error: Can't assign node "" to any location (ID: 176359)

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Has anybody came across this error? After hours of searching, I can't find anything on this.

I only get this error when I try to drive 8 or more register from one of the ALTPLL output.

Error: Can't assign node "name_altpll:auto_generated|wire_pll1_clk[0]" to any location (ID: 176359)

Help with signed output from ROM

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I am new to VHDL and FPGA and have been been trying to generate a sine wave by outputting the data from ROM. The ROM is single port and was generated using IP. The sine wave values were stored in a .Mif as signed decimals. When i read the ROM values it outputs my signed values as unsigned. I have tried converting the output from the ROM to signed but that didn't seem to work. Does anyone have any idea how to rectify this? At the moment i just have positive cycles of the sine wave showing in modelsim.


Any help would be appreciated

Kind regards,

Invalid memory implementation

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Please I need a help in following two questions:
First : I need to read from memory one element at a time, however, memory locations is not sequential so I need two variables as indicators.
The problem is, when I use one indicator, the memory is implemented correctly, but when I add the other one ( k in example below ) the memory tend to be logic.

IF rising_edge(clock) and show='1' THEN
outvalues<=Memory1(i+k)-outvalues; -- +k here is the issue.
k:=k+1;

if k=3 then
i:=i+8;
end if;

end if;

So, what is the solution for such case? how I guide the synthesizer to implement it as a memory?


Second question is: is it possible to initialize 2D array as an image ? , As I know MIF files are one dimension only.

Thank you.

C++ template in memory-mapped master

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Hello all,

I have a code from the Intel HLS examples. There is a C++ file for the master test bench operators. That tutorial demonstrate use of the getInterfaceAtIndex(int) operator on a memory-mapped master. Howver, in that code there is C++ template usage with a function. I am trying to understand the purpose of template usage. I will be grateful if any one can tell about it... Below is the whole code

#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include "HLS/hls.h"


using namespace std;
using namespace ihc;


typedef mm_master<unsigned int, dwidth<32>, awidth<64>, aspace<1>, latency<0>, maxburst<1> > mm_src_t;
typedef mm_master<unsigned int, dwidth<32>, awidth<64>, aspace<3>, latency<0>, maxburst<1> > mm_dst_t;


#define SEED 3
#define NUM_SAMPLES 8
//#define DUMP_BUFFERS


int verify_data(int *src, int *dst, int count, unsigned int x=0) {
int errors = 0;
for(int i = 0; i < count; i++) {
if(dst[i] != (src[i] + x)) {
errors++;
printf("mismatch at index %d: 0x%llx != 0x%llx\n", i, (unsigned long long)dst[i], (unsigned long long)src[i] + x);
}
}
return errors;
}


template<typename T> void dump_buffers(const char* title, T *ref, T *dst, unsigned size) {
#ifdef DUMP_BUFFERS
// Title
printf("%s:\n", title);
if(size == 0) return;
// Reference
printf(" REF:");
for(unsigned i=0; i<size-1; ++i) {
printf(" 0x%04x,", ref[i]);
if(i % 8 == 7) printf("\n ");
}
printf(" 0x%04x\n", ref[size-1]);
// Destination
printf(" DST:");
for(unsigned i=0; i<size-1; ++i) {
printf(" 0x%04x,", dst[i]);
if(i % 8 == 7) printf("\n ");
}
printf(" 0x%04x\n", dst[size-1]);
#endif
}


component void add_x(mm_src_t &src, mm_dst_t &dst, unsigned int x) {
*dst = *src + x;
}


int main () {
int x = 0;
int errors = 0;
int src_mem[NUM_SAMPLES];
int dst_mem[NUM_SAMPLES];


// initialize data
srand(SEED);
for (int i=0; i<NUM_SAMPLES; ++i) {
src_mem[i] = rand() % 2048;
dst_mem[i] = -1;
}
dump_buffers("Initial", src_mem, dst_mem, NUM_SAMPLES);




/*
1)
This code creates a new mm_master interface for each iteration of the loop.
*/
x = 0x10;
for (int i=0; i<NUM_SAMPLES; ++i) {
mm_src_t src_mm_i(&src_mem[i], 1*sizeof(int));
mm_dst_t dst_mm_i(&dst_mem[i], 1*sizeof(int));
ihc_hls_enqueue_noret(&add_x, src_mm_i, dst_mm_i, x);
}
ihc_hls_component_run_all(add_x);
dump_buffers("New mm_master for each index", src_mem, dst_mem, NUM_SAMPLES);
errors += verify_data(src_mem, dst_mem, NUM_SAMPLES, x);




/*
2)
This code demonstartes use of the getInterfaceAtIndex() function which can
be used to index into a mm_master object. This can be useful when iterating
over an array and invoking a component on different indices of the array.
*/
x = 0x20;
mm_src_t src_mm(src_mem, NUM_SAMPLES*sizeof(int));
mm_dst_t dst_mm(dst_mem, NUM_SAMPLES*sizeof(int));
for (int i=0; i<NUM_SAMPLES; ++i) {
ihc_hls_enqueue_noret(&add_x, src_mm.getInterfaceAtIndex(i), dst_mm.getInterfaceAtIndex(i), x);
}
ihc_hls_component_run_all(add_x);
dump_buffers("Use getInterfaceAtIndex()", src_mem, dst_mem, NUM_SAMPLES);
errors += verify_data(src_mem, dst_mem, NUM_SAMPLES, x);




if (errors) {
printf("FAILED with %d errors\n", errors);
} else {
printf("PASSED\n");
}
}

IPS file

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What is the use of IPS file and where can I use it?

Thanks in advance.

TimeQuist analyzer

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After compiling the design why always the timequist analyzer shows red color that means there is an unconstraint paths...

How to register DSP builder 13.1 blockset in MATLAB2012b?

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I have installed both MATLAB2012b and DSP builder13.1 (both compatible), but the standard blockset does not show up in the simulink library. Any help will be much appreciated.

Invalid memory implementation

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Please I need a help in following two questions:
First : I need to read from memory one element at a time, however, memory locations is not sequential so I need two variables as indicators.
The problem is, when I use one indicator, the memory is implemented correctly, but when I add the other one ( k in example below ) the memory tend to be logic.

IF rising_edge(clock) and show='1' THEN
outvalues<=Memory1(i+k)-outvalues; -- +k here is the issue.
k:=k+1;

if k=3 then
i:=i+8;
end if;

end if;

So, what is the solution for such case? how I guide the synthesizer to implement it as a memory?


Second question is: is it possible to initialize 2D array as an image ? , As I know MIF files are one dimension only.

Thank you.

C++ template in memory-mapped master

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Hello all,

I have a code from the Intel HLS examples. There is a C++ file for the master test bench operators. That tutorial demonstrate use of the getInterfaceAtIndex(int) operator on a memory-mapped master. Howver, in that code there is C++ template usage with a function. I am trying to understand the purpose of template usage. I will be grateful if any one can tell about it... Below is the whole code

#include <iostream>
#include <stdio.h>
#include <stdlib.h>
#include "HLS/hls.h"


using namespace std;
using namespace ihc;


typedef mm_master<unsigned int, dwidth<32>, awidth<64>, aspace<1>, latency<0>, maxburst<1> > mm_src_t;
typedef mm_master<unsigned int, dwidth<32>, awidth<64>, aspace<3>, latency<0>, maxburst<1> > mm_dst_t;


#define SEED 3
#define NUM_SAMPLES 8
//#define DUMP_BUFFERS


int verify_data(int *src, int *dst, int count, unsigned int x=0) {
int errors = 0;
for(int i = 0; i < count; i++) {
if(dst[i] != (src[i] + x)) {
errors++;
printf("mismatch at index %d: 0x%llx != 0x%llx\n", i, (unsigned long long)dst[i], (unsigned long long)src[i] + x);
}
}
return errors;
}


template<typename T> void dump_buffers(const char* title, T *ref, T *dst, unsigned size) {
#ifdef DUMP_BUFFERS
// Title
printf("%s:\n", title);
if(size == 0) return;
// Reference
printf(" REF:");
for(unsigned i=0; i<size-1; ++i) {
printf(" 0x%04x,", ref[i]);
if(i % 8 == 7) printf("\n ");
}
printf(" 0x%04x\n", ref[size-1]);
// Destination
printf(" DST:");
for(unsigned i=0; i<size-1; ++i) {
printf(" 0x%04x,", dst[i]);
if(i % 8 == 7) printf("\n ");
}
printf(" 0x%04x\n", dst[size-1]);
#endif
}


component void add_x(mm_src_t &src, mm_dst_t &dst, unsigned int x) {
*dst = *src + x;
}


int main () {
int x = 0;
int errors = 0;
int src_mem[NUM_SAMPLES];
int dst_mem[NUM_SAMPLES];


// initialize data
srand(SEED);
for (int i=0; i<NUM_SAMPLES; ++i) {
src_mem[i] = rand() % 2048;
dst_mem[i] = -1;
}
dump_buffers("Initial", src_mem, dst_mem, NUM_SAMPLES);




/*
1)
This code creates a new mm_master interface for each iteration of the loop.
*/
x = 0x10;
for (int i=0; i<NUM_SAMPLES; ++i) {
mm_src_t src_mm_i(&src_mem[i], 1*sizeof(int));
mm_dst_t dst_mm_i(&dst_mem[i], 1*sizeof(int));
ihc_hls_enqueue_noret(&add_x, src_mm_i, dst_mm_i, x);
}
ihc_hls_component_run_all(add_x);
dump_buffers("New mm_master for each index", src_mem, dst_mem, NUM_SAMPLES);
errors += verify_data(src_mem, dst_mem, NUM_SAMPLES, x);




/*
2)
This code demonstartes use of the getInterfaceAtIndex() function which can
be used to index into a mm_master object. This can be useful when iterating
over an array and invoking a component on different indices of the array.
*/
x = 0x20;
mm_src_t src_mm(src_mem, NUM_SAMPLES*sizeof(int));
mm_dst_t dst_mm(dst_mem, NUM_SAMPLES*sizeof(int));
for (int i=0; i<NUM_SAMPLES; ++i) {
ihc_hls_enqueue_noret(&add_x, src_mm.getInterfaceAtIndex(i), dst_mm.getInterfaceAtIndex(i), x);
}
ihc_hls_component_run_all(add_x);
dump_buffers("Use getInterfaceAtIndex()", src_mem, dst_mem, NUM_SAMPLES);
errors += verify_data(src_mem, dst_mem, NUM_SAMPLES, x);




if (errors) {
printf("FAILED with %d errors\n", errors);
} else {
printf("PASSED\n");
}
}

IPS file

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What is the use of IPS file and where can I use it?

Thanks in advance.

TimeQuist analyzer

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After compiling the design why always the timequist analyzer shows red color that means there is an unconstraint paths...

How to register DSP builder 13.1 blockset in MATLAB2012b?

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I have installed both MATLAB2012b and DSP builder13.1 (both compatible), but the standard blockset does not show up in the simulink library. Any help will be much appreciated.

Error (209040): Can't access JTAG chain >>> MAX 10 FPGA Development Kit Board

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I have some problem while using MAX 10 FPGA Development Kit Board.
In Programmer Window , Updata .sof file, failed:
Error (209040): Can't access JTAG chain
Error (209012): Operation failed


but in SignalTap II Logic Analyzer window, it can execute succeed.


What problem!
Thanks.
Attached Images

How to register DSP builder 13.1 blockset in MATLAB2012b?

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I have already installed both the MATLAB2012b version and DSP builder 13.1, Quartus13.1, but the DSP builder blockset does not show up in the simulink library. Any suggestions will be appreciated.

Problems running the Cyclone 10 LP Evaluation Board, Board Test System

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When I attempt to run the "Board Test System" in the Cyclone 10 LP Evaluation Board download, I receive the following error: (see attachment, if image not visible):




The board is completely functional, I have created my own albeit simple, designs and downloaded them successfully using the same cable that results in the error mentioned above.

I'm sure that this is pilot error on my part but if anyone is able to explain how I'm shooting myself in the foot it would be much appreciated!

Thanks,
Wayne
Attached Images
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